Unbalanced Bit-slicing Scheme for Accurate Memristor-based Neural Network Architecture

Unbalanced Bit-slicing Scheme for Accurate Memristor-based Neural Network Architecture

Diware, S.S. (TU Delft Computer Engineering)
Gebregiorgis, A.B. (TU Delft Computer Engineering)
Joshi, Rajiv V. (IBM Research)
Hamdioui, S. (TU Delft Quantum & Computer Engineering)
Bishnoi, R.K. (TU Delft Computer Engineering)

Quantum & Computer Engineering

2021

Emerging memristor-based computing has the potential to achieve higher computational efficiency over conventional architectures. Bit-slicing scheme, which represents a single neural weight using multiple memristive devices, is usually introduced in memristor-based neural networks to meet high bit-precision demands. However, the accuracy of such networks can be significantly degraded due to non-zero minimum conductance $(\mathrm{G}_{min})$ of memristive devices. This paper proposes an unbalanced bit-slicing scheme; it uses smaller slice sizes for more important bits to provide higher sensing margin and reduces the impact of non-zero $\mathrm{G}_{min}$. Moreover, the unbalanced bit-slicing is assisted by 2’s complement arithmetic which further improves the accuracy. Simulation results show that our proposed scheme can achieve up to $8.8 \times $ and $1.8 \times $ accuracy compared to state-of-the-art for single-bit and two-bit configurations respectively, at reasonable energy overheads.

http://resolver.tudelft.nl/uuid:8d12c14c-98cc-4b09-ab88-ad278f965592

https://doi.org/10.1109/AICAS51828.2021.9458443

IEEE

978-1-6654-3025-8

2021 IEEE 3rd International Conference on Artificial Intelligence Circuits and Systems (AICAS)

2021 IEEE 3rd International Conference on Artificial Intelligence Circuits and Systems (AICAS), 2021-06-06 → 2021-06-09, Online at Washington, United States

Accepted author manuscript

Institutional Repository

conference paper

© 2021 S.S. Diware, A.B. Gebregiorgis, Rajiv V. Joshi, S. Hamdioui, R.K. Bishnoi