Systematic design of regular VLSI processor arrays

Title

Systematic design of regular VLSI processor arrays

Author

Bu, J.

Contributor

Dewilde, P. (promotor)

Faculty

Electrical Engineering, Mathematics and Computer Science

Date

1990-05-22

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http://resolver.tudelft.nl/uuid:f9bedd53-93fa-454c-b6ea-4b82c577577b

Part of collection

Institutional Repository

Document type

doctoral thesis

Rights

(c) 1990 J. Bu