A 1024-Channel 268 nW/pixel 36x36 μm²/ch Data-Compressive Neural Recording IC for High-Bandwidth Brain-Computer Interfaces

This paper presents a neural recording IC featuring lossy compression during digitization, thus preventing data deluge and enabling a compact active digital pixel design. The wired-OR-based compression discards unwanted baseline samples while allowing the reconstruction of spike samples. The IC features a 32x32 MEA with 36 μ m pixel pitch and...

A 0.53pJK27000μm2resistor-based temperature sensor with an inaccuracy of ±0.35°C (3σ) in 65nm CMOS

In microprocessors and DRAMs, on-chip temperature sensors are essential components, ensuring reliability by monitoring thermal gradients and hot spots. Such sensors must be as small as possible, since multiple sensors are required for dense thermal monitoring. However, conventional BJT-based temperature sensors are not compatible with the sub...

Initial design of an LADM-based 3D Cadastre - Case study from Korea

Korea and The Netherlands have started a 3 year cooperation covering joint research, capacity building and international advisory in the domain of cadastre and land administration with a special focus on 3D developments. At the Korean side the Korea Cadastral Survey Corporation and the University of Seoul are involved, while at the Netherlands...

Initial Design of an LADM-based 3D Cadastre –Case Study from Korea

Korea and The Netherlands have started a 3 year cooperation covering joint research, capacity building and international advisory in the domain of cadastre and land administration with a special focus on 3D developments. At the Korean side the Korea Cadastral Survey Corporation and the University of Seoul are involved, while at the Netherlands...