Genetic Algorithm–Assisted Design of Redistribution Layer Vias for a Fan-Out Panel-Level SiC MOSFET Power Module Packaging

A fan-out panel-level packaging (FOPLP) with an embedded redistribution layer (RDL) via interconnection reduces the size, thermal resistance, and parasitic inductance of power module packaging. In this study, the effect of the RDL via size on the reliability of a FOPLP SiC MOSFET power module was investigated. To improve the thermal management...

Numerical thermal analysis and optimization of multi-chip LED module using response surface methodology and genetic algorithm

In this paper, the heat transfer performance of the multi-chip (MC) LED module is investigated numerically by using a general analytical solution. The configuration of the module is optimized with genetic algorithm (GA) combined with a response surface methodology. The space between chips, the thickness of the metal core printed circuit board...

Overdriving reliability of chip scale packaged LEDs: Quantitatively analyzing the impact of component

The objective of this study is to quantitatively evaluate the impacts of LED components on the overdriving reliability of high power white LED chip scale packages (CSPs). The reliability tests under room temperature are conducted over 1000 h in this study on CSP LEDs with overdriving currents. A novel method is proposed to investigate the...