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Aziza, Hassen (author), Zambelli, Cristian (author), Hamdioui, S. (author), Diware, S.S. (author), Bishnoi, R.K. (author), Gebregiorgis, A.B. (author)
Emerging device technologies such as Resistive RAMs (RRAMs) are under investigation by many researchers and semiconductor companies; not only to realize e.g., embedded non-volatile memories, but also to enable energy-efficient computing making use of new data processing paradigms such as computation-in-memory. However, such devices suffer from...
conference paper 2023
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Aouichi, A. (author), Yuan, S. (author), Fieback, M. (author), Rao, Siddharth (author), Kim, Woojin (author), Marinissen, Erik Jan (author), Couet, Sebastien (author), Taouil, M. (author), Hamdioui, S. (author)
Spin-Transfer Torque Magnetic RAMs (STT-MRAMs) are on their way to commercialization. However, obtaining high-quality test and diagnosis solutions for STT-MRAMs is challenging due to the existence of unique defects in Magnetic Tunneling Junctions (MTJs). Recently, the Device-Aware Test (DA-Test) method has been put forward as an effective...
conference paper 2023
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Cardoso Medeiros, G. (author), Fieback, M. (author), Gebregiorgis, A.B. (author), Taouil, M. (author), Poehls, L. B. (author), Hamdioui, S. (author)
High-quality memory diagnosis methodologies are critical enablers for scaled memory devices as they reduce time to market and provide valuable information regarding test escapes and customer returns. This paper presents an efficient Hierarchical Memory Diagnosis (HMD) approach that accurately diagnoses faults in the entire memory. Faults are...
conference paper 2022
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Singh, A. (author), Fieback, M. (author), Bishnoi, R.K. (author), Bradarić, Filip (author), Gebregiorgis, A.B. (author), Joshi, R.V. (author), Hamdioui, S. (author)
Emerging non-volatile resistive RAM (RRAM) device technology has shown great potential to cultivate not only high-density memory storage, but also energy-efficient computing units. However, the unique challenges related to RRAM fabrication process render the traditional memory testing solutions inefficient and inadequate for high product quality...
conference paper 2022
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El Arrassi, A.E. (author), Gebregiorgis, A.B. (author), Haddadi, Anass El (author), Hamdioui, S. (author)
Spiking Neural Networks (SNNs) can drastically improve the energy efficiency of neuromorphic computing through network sparsity and event-driven execution. Thus, SNNs have the potential to support practical cognitive tasks on resource constrained platforms, such as edge devices. To realize this, SNN requires energy-efficient hardware which can...
conference paper 2022
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Zahedi, M.Z. (author), Shahroodi, Taha (author), Custers, Geert (author), Singh, A. (author), Wong, J.S.S.M. (author), Hamdioui, S. (author)
In recent years, we are witnessing a trend moving away from conventional computer architectures towards Computation-In-Memory (CIM) based on emerging memristor devices. This is due to the fact that the performance and energy efficiency of traditional computer architectures can no longer be increased at the same pace as before. The main barriers...
conference paper 2022
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Gebregiorgis, A.B. (author), Singh, A. (author), Diware, S.S. (author), Bishnoi, R.K. (author), Hamdioui, S. (author)
Computation-In-Memory (CIM) using memristor devices provides an energy-efficient hardware implementation of arithmetic and logic operations for numerous applications, such as neuromorphic computing and database query. However, memristor-based CIM suffers from various non-idealities such as conductance drift, read disturb, wire parasitics,...
conference paper 2022
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Köylü, T.C. (author), Fieback, M. (author), Hamdioui, S. (author), Taouil, M. (author)
Fault injection attacks pose an important threat to security-sensitive applications, such as secure communication and storage. By injecting faults into instructions, an attacker can cause information leakage or denial-of-service. Hence, it is important to secure the sensitive parts not only by detecting faults in the executed instructions but...
conference paper 2022
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Fieback, M. (author), Münch, Christopher (author), Gebregiorgis, A.B. (author), Cardoso Medeiros, G. (author), Taouil, M. (author), Hamdioui, S. (author), Tahoori, Mehdi (author)
Emerging non-volatile resistive memories like Spin-Transfer Torque Magnetic Random Access Memory (STT-MRAM) and Resistive RAM (RRAM) are in the focus of today’s research. They offer promising alternative computing architectures such as computation-in-memory (CiM) to reduce the transfer overhead between CPU and memory, usually referred to as the...
conference paper 2022
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Masoumian, S. (author), Selimis, Georgios (author), Wang, Rui (author), Schrijen, Geert-Jan (author), Hamdioui, S. (author), Taouil, M. (author)
SRAM Physical Unclonable Functions (PUFs) are among other things today commercially used for secure primitives such as key generation and authentication. The quality of the PUFs and hence the security primitives, depends on intrinsic variations which are technology dependent. Therefore, to sustain the commercial usage of PUFs for cutting-edge...
conference paper 2022
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Shahroodi, Taha (author), Zahedi, M.Z. (author), Abhairaj Singh, A. (author), Wong, J.S.S.M. (author), Hamdioui, S. (author)
State-of-the-art taxonomic profilers that comprise the first step in larger-context metagenomic studies have proven to be computationally intensive, i.e., while accurate, they come at the cost of high latency and energy consumption. Table Lookup operation is a primary bottleneck of today's profilers. In this paper, we first propose TL-PIM, a...
conference paper 2022
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Cem Gursoy, Cemil (author), Kraak, D.H.P. (author), Ahmed, Foisal (author), Taouil, M. (author), Jenihhin, Maksim (author), Hamdioui, S. (author)
Memory designs require timing margins to compensate for aging and fabrication process variations. With technology downscaling, aging mechanisms became more apparent, and larger margins are considered necessary. This, in return, means a larger area requirement and lower performance for the memory. Bias Temperature Instability (BTI) is one of the...
conference paper 2022
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Fieback, M. (author), Taouil, M. (author), Hamdioui, S. (author)
Testing of Computation-in-Memory (CIM) designs based on emerging non-volatile memory technologies, such as resistive RAM (RRAM), is fundamentally different from testing traditional memories. Such designs allow not only for data storage (i.e., memory configuration) but also for the execution of logical and arithmetic operations (i.e., computing...
conference paper 2022
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Köylü, T.C. (author), Caetano Garaffa, L. (author), Reinbrecht, Cezar (author), Zahedi, M.Z. (author), Hamdioui, S. (author), Taouil, M. (author)
The massive deployment of Internet of Things (IoT) devices makes them vulnerable against physical tampering attacks, such as fault injection. These kind of hardware attacks are very popular as they typically do not require complex equipment or high expertise. Hence, it is important that IoT devices are protected against them. In this work, we...
conference paper 2022
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Copetti, T.S. (author), Nilovic, M. (author), Fieback, M. (author), Gemmeke, T. (author), Hamdioui, S. (author), Bolzani Poehls, L.M. (author)
Memristive devices have become promising candidates to complement and/or replace the CMOS technology, due to their CMOS manufacturing process compatibility, zero standby power consumption, high scalability, as well as their capability to implement high-density memories and new computing paradigms. Despite these advantages, memristive devices are...
conference paper 2022
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Singh, A. (author), Zahedi, M.Z. (author), Shahroodi, Taha (author), Gupta, Mohit (author), Gebregiorgis, A.B. (author), Komalan, Manu (author), Joshi, R.V. (author), Catthoor, Francky (author), Bishnoi, R.K. (author), Hamdioui, S. (author)
Spin-transfer torque magnetic random access memory (STT-MRAM) based computation-in-memory (CIM) architectures have shown great prospects for an energy-efficient computing. However, device variations and non-idealities narrow down the sensing margin that severely impacts the computing accuracy. In this work, we propose an adaptive referencing...
conference paper 2022
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Aljuffri, A.A.M. (author), Reinbrecht, Cezar (author), Hamdioui, S. (author), Taouil, M. (author), Sepulveda, Johanna (author)
Currently NIST is working towards the standardization of lightweight cryptography (LWC). Although the cryptanalytic strength of LWC is currently under deep scrutiny, the LWC implementation security has not been yet widely explored. GIFT block cipher is the main building block of many of the LWC NIST candidates and therefore has the potential to...
conference paper 2022
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Köylü, T.C. (author), Hamdioui, S. (author), Taouil, M. (author)
Artificial neural networks (ANNs) are used to accomplish a variety of tasks, including safety critical ones. Hence, it is important to protect them against faults that can influence decisions during operation. In this paper, we propose smart and low-cost redundancy schemes that protect the most vulnerable ANN parts against fault attacks....
conference paper 2022
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Singh, A. (author), Bishnoi, R.K. (author), Joshi, Rajiv V. (author), Hamdioui, S. (author)
Resistive random access memory (RRAM) based computation-in-memory (CIM) architectures are attracting a lot of attention due to their potential in performing fast and energy-efficient computing. However, the RRAM variability and non-idealities limit the computing accuracy of such architectures, especially for multi-operand logic operations....
conference paper 2022
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Gebregiorgis, A.B. (author), Zografou, Artemis (author), Hamdioui, S. (author)
Computation-In Memory (CIM) using RRAM crossbar array is a promising solution to realize energy-efficient neuromorphic hardware, such as Binary Neural Networks (BNNs). However, RRAM faults restrict the applicability of CIM for BNN implementation. To address this issue, we propose a fault tolerance framework to mitigate the impact of RRAM faults...
conference paper 2022
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