Data Acquisition System Design for a 160x128 Single-photon Image Sensor with On-pixel 55 ps Time-to-digital Converter

Time-resolved image sensors enabling picosecond resolutions over large formats are needed in many advanced imaging fields, from fluorescence lifetime imaging microscopy (FLIM) to positron emission tomography (PET). Integrated single-photon avalanche diode (SPAD) technology embodies the new frontiers of time-resolved imaging, namely better...

Fingerprint Verification on the VEX Processor

The speed gap between a processor realized in Semi-custom ASIC technology and a processor realized in FPGA technology is narrowing. In processor design, the approach is to define the microarchitecture of the processor and to design and implement it for executing an application domain. In this thesis, we have investigated the approach to design a...

Design and Implementation of Real-Time High-Defnition Stereo Matching SoC on FPGA

Stereo matching has been widely used in many fields, such as viewpoint interpolation, feature detection system and free-view TV. However, the long processing time of stereo matching algorithms has been the major bottleneck that limits their real-time applications. During the past decades, many implementation platforms and corresponding algorithm...

Reconfigurable Trigger Logic for Electronic Instrumentation in Space Applications

Future space missions have to rely on advanced, smart and very light payloads in order to explore the solar system within a reasonable cost envelope. For this reason, efforts are made to obtain higher levels of integration that can reduce costs and allow the presence of more and more instruments on board of small spacecrafts. With the advent of...

Hardware implementation of digital signal processing algorithms for long distance pipeline inspections

Inspections on transmission pipelines in the petrochemical industry are regularly conducted in order to guarantee safety of operations. Inspection devices are sent through the lines to record sensor data, this data needs to be post-processed in order to be able to make an analysis on the state of the pipeline. In this thesis, existing software...

IWEX: Mapping on current high performance architectures

IWEX stands for Invers Wavefield Extrapolation and is commonly used in seismic exploration. Niels Pörtzgen[15] showed that this technique can also be used for inspection of welds. This thesis describes two domains in which the IWEX algorithm can be calculated. The time domain which has a quantization problem and the frequency domain which is...

Protocol conversions for the Aethereal Networks-on-Chip

Bus based interconnects are commonly used to connect Intellectual Properties (IPs) on System-on-Chip (SoC). However, as the number of high performance IPs with large communication requirements in a Multi Processor SoC (MPSoC) increases, the bus interconnects become a communication bottleneck. To overcome this limitation, the bus based...

Implementing Texture Feature Extraction Algorithms on FPGA

Feature extraction is a key function in various image processing applications. A feature is an image characteristic that can capture certain visual property of the image. Texture is an important feature of many image types, which is the pattern of information or arrangement of the structure found in a picture. Texture features are used in...

FPGA Hardware acceleration of co-occurring aberrations in aCGH data

Unbalanced transaction can lead to addition and deletions in genes, which can be an indication of tumor cells. This is measured with array Comparative Genomic Hybridization. To find co-occurring aberrations in DNA, an algorithm was designed. However the execution takes days to find these DNA aberrations. This thesis proposes a partial FPGA based...

Feasibilty Analysis for Hardware Acceleration of Pattern Recognition Algorithms

This thesis presents a feasibility analysis for hardware acceleration of the pattern recognition algorithms used by the Media Knowledge Engineering department at the Delft University of Technology. The feasibility analysis is conducted on a number of different algorithm classes. The Parzen Window algorithm appeared to be the most suitable option...

A hardware Accelerator for the OpenFOAM Sparse Matrix-Vector Product

One of the key kernels in scientific applications is the Sparse Matrix Vector Multiplication (SMVM). Profiling OpenFOAM, a sophisticated scientific Computational Fluid Dynamics tool, proved the SMVM to be its most computational intensive kernel. A traditional way to solve such computationally intensive problems in scientific applications is to...