Balanced ternary addition using a gated silicon nanowire

Ternary logic has the lowest cost of complexity, here, we demonstrate a CMOS hardware implementation of a ternary adder using a silicon metal-on-insulator single electron transistor. Gate dependent rectifying behavior of a single electron transistor (SET) results in a robust three-valued output as a function of the potential of the single...

Drain current modulation in a nanoscale field-effect-transistor channel by single dopant implantation

We demonstrate single dopant implantation into the channel of a silicon nanoscale metal-oxide-semiconductor field-effect-transistor. This is achieved by monitoring the drain current modulation during ion irradiation. Deterministic doping is crucial for overcoming dopant number variability in present nanoscale devices and for exploiting single...