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Hamdioui, S. (author), Al-Ars, Z. (author), Jimenez, J. (author), Calero, J. (author)
This paper summarizes advanced test patterns designed to target dynamic and time-related faults caused by new defect mechanisms in deep-submicron memory technologies. Such tests are industrially evaluated together with the traditional tests at "Design of Systems on Silicon (DS2)" in Spain in order to (a) validate the used fault models and (b)...
conference paper 2007
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Augusto da Silva, F. (author), Bagbaba, Ahmet Cagri (author), Hamdioui, S. (author), Sauer, Christian (author)
This work aims at an alternative method to verify the correctness of Fault Lists generated by fault simulators tools in context of safety verification. The lists generated by simulation tools are verified against lists from formal tools. The consistency evaluation between the lists supports the Tool Confidence Level (TCL) assessment, defined in...
conference paper 2018
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Aljuffri, A.A.M. (author), Reinbrecht, Cezar (author), Hamdioui, S. (author), Taouil, M. (author), Sepulveda, Johanna (author)
Currently NIST is working towards the standardization of lightweight cryptography (LWC). Although the cryptanalytic strength of LWC is currently under deep scrutiny, the LWC implementation security has not been yet widely explored. GIFT block cipher is the main building block of many of the LWC NIST candidates and therefore has the potential to...
conference paper 2022
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Yaldagard, Mohammad Amin (author), Diware, S.S. (author), Joshi, R.V. (author), Hamdioui, S. (author), Bishnoi, R.K. (author)
Resistive random access memory (RRAM) based computation-in-memory (CIM) architectures can meet the unprecedented energy efficiency requirements to execute AI algorithms directly on edge devices. However, the read-disturb problem associated with these architectures can lead to accumulated computational errors. To achieve the necessary level of...
conference paper 2023
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Mahmoud, A.N.N. (author), Cucu Laurenciu, N. (author), Vanderveken, Frederic (author), Ciubotaru, Florin (author), Adelmann, Christoph (author), Cotofana, S.D. (author), Hamdioui, S. (author)
In the early stages of a novel technology development, it is difficult to provide a comprehensive assessment of its potential capabilities and impact. Nevertheless, some preliminary estimates can be drawn and are certainly of great interest and in this paper we follow this line of reasoning within the framework of the Spin Wave (SW) based...
conference paper 2022
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Singh, A. (author), Zahedi, M.Z. (author), Shahroodi, T. (author), Gupta, Mohit (author), Gebregiorgis, A.B. (author), Komalan, Manu (author), Joshi, R.V. (author), Catthoor, Francky (author), Bishnoi, R.K. (author), Hamdioui, S. (author)
Spin-transfer torque magnetic random access memory (STT-MRAM) based computation-in-memory (CIM) architectures have shown great prospects for an energy-efficient computing. However, device variations and non-idealities narrow down the sensing margin that severely impacts the computing accuracy. In this work, we propose an adaptive referencing...
conference paper 2022
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Yuan, S. (author), Zhang, Z. (author), Fieback, M. (author), Xun, H. (author), Marinissen, E. J. (author), Kar, G. S. (author), Rao, S. (author), Couet, S. (author), Taouil, M. (author), Hamdioui, S. (author)
The development of Spin-Transfer Torque Magnetic RAMs (STT-MRAMs) mass production requires high-quality test solutions. Accurate and appropriate fault modeling is crucial for the realization of such solutions. This paper targets fault modeling and test generation for all interconnect and contact defects in STT-MRAMs and shows that using the...
conference paper 2023
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Taouil, M. (author), Reinbrecht, Cezar (author), Hamdioui, S. (author), Sepulveda, Johanna (author)
Dynamic Random Access Memory (DRAM)-based systems are widely used in mobile and portable applications where low-cost and high-storage memory capability are required. However, such systems are prone to attacks. A latent threat to DRAM-based system security is the so-called Rowhammer attacks. By repeatedly accessing memory, an attacker is able to...
conference paper 2021
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Gomony, Manil Dev (author), de Putter, Floran (author), Gebregiorgis, A.B. (author), Paulin, Gianna (author), Mei, Linyan (author), Jain, Vikram (author), Hamdioui, S. (author), Bishnoi, R.K. (author), Sanchez, Victor (author)
With the rise of deep learning (DL), our world braces for artificial intelligence (AI) in every edge device, creating an urgent need for edge-AI SoCs. This SoC hardware needs to support high throughput, reliable and secure AI processing at ultra-low power (ULP), with a very short time to market. With its strong legacy in edge solutions and open...
conference paper 2023
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Shahroodi, Taha (author), Cardoso, Rafaela (author), Zahedi, M.Z. (author), Wong, J.S.S.M. (author), Bosio, Alberto (author), O'Connor, Ian (author), Hamdioui, S. (author)
This paper investigates the potential of a compute-in-memory core based on optical Phase Change Materials (oPCMs) to speed up and reduce the energy consumption of the Matrix-Matrix-Multiplication operation. The paper also proposes a new data mapping for Binary Neural Networks (BNNs) tailored for our oPCM core. The preliminary results show a...
conference paper 2023
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Zahedi, M.Z. (author), Custers, Geert (author), Shahroodi, Taha (author), Gaydadjiev, G. (author), Wong, J.S.S.M. (author), Hamdioui, S. (author)
Performing analysis on large graph datasets in an energy-efficient manner has posed a significant challenge; not only due to excessive data movements and poor locality, but also due to the non-optimal use of high sparsity of such datasets. The latter leads to a waste of resources as the computation is also performed on zero's operands which do...
conference paper 2023
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Yuan, S. (author), Taouil, M. (author), Fieback, M. (author), Xun, H. (author), Marinissen, Erik Jan (author), Kar, Gouri Sankar (author), Rao, Sidharth (author), Couet, Sebastien (author), Hamdioui, S. (author)
The development of Spin-transfer torque magnetic RAM (STT-MRAM) mass production requires high-quality dedicated test solutions, for which understanding and modeling of manufacturing defects of the magnetic tunnel junction (MTJ) is crucial. This paper introduces and characterizes a new defect called Back-Hopping (BH); it also provides its...
conference paper 2023
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Xun, H. (author), Fieback, M. (author), Yuan, S. (author), Zhang, Ziwei (author), Taouil, M. (author), Hamdioui, S. (author)
Resistive Random Access Memory (RRAM) is a potential technology to replace conventional memories by providing low power consumption and high-density storage. As various manufacturing vendors make significant efforts to push it to high-volume production and commercialization, high-quality and efficient test solutions are of great importance. This...
conference paper 2023
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Fieback, M. (author), Bradarić, Filip (author), Taouil, M. (author), Hamdioui, S. (author)
Resistive Random Access Memory (RRAM, or ReRAM) is a promising memory technology to replace Flash because of its low power consumption, high storage density, and simple integration in existing IC production processes. This has motivated many companies to invest in this technology. However, RRAM manufacturing introduces new failure mechanisms and...
conference paper 2023
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Singh, A. (author), Bishnoi, R.K. (author), Kaichouhi, A. (author), Diware, S.S. (author), Joshi, R.V. (author), Hamdioui, S. (author)
Analog computation-in-memory (CIM) architecture alleviates massive data movement between the memory and the processor, thus promising great prospects to accelerate certain computational tasks in an energy-efficient manner. However, data converters involved in these architectures typically achieve the required computing accuracy at the expense...
conference paper 2023
document
Diware, S.S. (author), Gebregiorgis, A.B. (author), Joshi, R.V. (author), Hamdioui, S. (author), Bishnoi, R.K. (author)
Memristor-based computation-in-memory (CIM) can achieve high energy efficiency by processing the data within the memory, which makes it well-suited for applications like neural networks. However, memristors suffer from conductance variation problem where their programmed conductance values deviate from the desired values. Such variations lead...
conference paper 2023
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Diware, S.S. (author), Gebregiorgis, A.B. (author), Joshi, Rajiv V. (author), Hamdioui, S. (author), Bishnoi, R.K. (author)
Emerging memristor-based computing has the potential to achieve higher computational efficiency over conventional architectures. Bit-slicing scheme, which represents a single neural weight using multiple memristive devices, is usually introduced in memristor-based neural networks to meet high bit-precision demands. However, the accuracy of such...
conference paper 2021
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Xun, H. (author), Fieback, M. (author), Yuan, S. (author), Aziza, Hassen (author), Heidekamp, Mathijs (author), Copetti, Thiago (author), Poehls, Leticia Bolzani (author), Taouil, M. (author), Hamdioui, S. (author)
Resistive Random Access Memories (RRAMs) are being commercialized with significant investment from several semiconductor companies. In order to provide efficient and high-quality test solutions to push high-volume production, a comprehensive understanding of manufacturing defects is significantly required. This paper identifies and characterizes...
conference paper 2023
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Mahmoud, A.N.N. (author), Vanderveken, Frederic (author), Adelmann, Christoph (author), Ciubotaru, Florin (author), Hamdioui, S. (author), Cotofana, S.D. (author)
By their very nature, voltage/current excited Spin Waves (SWs) propagate through waveguides without consuming noticeable power. If SW excitation is performed by the continuous application of voltages/currents to the input, which is usually the case, the overall energy consumption is determined by the transducer power and the circuit critical...
conference paper 2021
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Cem Gursoy, Cemil (author), Kraak, D.H.P. (author), Ahmed, Foisal (author), Taouil, M. (author), Jenihhin, Maksim (author), Hamdioui, S. (author)
Memory designs require timing margins to compensate for aging and fabrication process variations. With technology downscaling, aging mechanisms became more apparent, and larger margins are considered necessary. This, in return, means a larger area requirement and lower performance for the memory. Bias Temperature Instability (BTI) is one of the...
conference paper 2022
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