Characterization of Single-Photon Avalanche Diodes in Standard 140-nm SOI CMOS Technology

We report on the characterization of single-photon avalanche diodes (SPADs) fabricated in standard 140-nm silicon on insulator (SOI) complementary metal-oxide-semiconductor (CMOS) technology. As a methodology for SPAD optimization, a test structure array, called SPAD farm, was realized with several junctions, guard-ring structures, dimensions,...

High-Performance Back-Illuminated Three-Dimensional Stacked Single-Photon Avalanche Diode Implemented in 45-nm CMOS Technology

We present a high-performance back-illuminated three-dimensional stacked single-photon avalanche diode (SPAD), which is implemented in 45-nm CMOS technology for the first time. The SPAD is based on a P⁺/Deep N-well junction with a circular shape, for which N-well is intentionally excluded to achieve a wide depletion region, thus...