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Van den Berg, A. (author), Ren, P. (author), Marinissen, E.J. (author), Gaydadjiev, G. (author), Goossens, K. (author)Test data travels through a System on Chip (SOC) from the chip pins to the Core-Under-Test (CUT) and vice versa via a Test Access Mechanism (TAM). Conventionally, a TAM is implemented using dedicated communication infrastructure. However, also existing functional interconnect, such as a bus or Network on Chip (NOC), can be reused as TAM; this...journal article 2010