Parallel Matrix Multiplication on Memristor-Based Computation-in-Memory Architecture

One of the most important constraints of today’s architectures for data-intensive applications is the limited bandwidth due to the memory-processor communication bottleneck. This significantly impacts performance and energy. For instance, the energy consumption share of communication and memory<br/>access may exceed 80%. Recently, the concept of...

Skeleton-based design and simulation flow for Computation-in-Memory architectures

Memristor-based Computation-in-Memory is one of the emerging architectures proposed to deal with Big Data problems. The design of such architectures requires a radically new automatic design flow because the memristor is a passive device that uses resistance to encode its logic value. This paper proposes a design flow for mapping parallel...