Searched for: collection%253Air
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Yu, J. (author), Abu Lebdeh, M.F.M. (author), Du Nguyen, H.A. (author), Taouil, M. (author), Hamdioui, S. (author)
Conventional computing architectures and the CMOS technology that they are based on are facing major challenges such as the memory bottleneck making the memory access for data transfer a major killer of energy and performance. Computation-in-memory (CIM) paradigm is seen as a potential alternative that could alleviate such problems by adding...
conference paper 2020
document
Zahedi, M.Z. (author), Mayahinia, M. (author), Abu Lebdeh, M.F.M. (author), Wong, J.S.S.M. (author), Hamdioui, S. (author)
Von Neumann-based architectures suffer from costly communication between CPU and memory. This communication imposes several orders of magnitude more power and performance overheads compared to the arithmetic operations performed by the processor. This overhead becomes critical for applications that require processing a large amount of data....
conference paper 2020
document
Abu Lebdeh, M.F.M. (author), Reinsalu, Uljana (author), Du Nguyen, H.A. (author), Wong, J.S.S.M. (author), Hamdioui, S. (author)
Emerging computing applications (such as big-data and Internet-of-things) are extremely demanding in terms of storage, energy and computational efficiency, while today’s architectures and device technologies are facing major challenges making them incapable to meet these demands. Computation-in-Memory (CIM) architecture based on memristive...
conference paper 2019
document
Yu, J. (author), Du Nguyen, H.A. (author), Abu Lebdeh, M.F.M. (author), Taouil, M. (author), Hamdioui, S. (author)
Automata Processor (AP) is a special implementation of non-deterministic finite automata that performs pattern matching by exploring parallel state transitions. The implementation typically contains a hierarchical switching network, causing long latency. This paper proposes a methodology to split such a hierarchical switching network into...
conference paper 2019
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