Characterization and Modeling of Self-Heating in Nanometer Bulk-CMOS at Cryogenic Temperatures

This work presents a self-heating study of a 40-nm bulk-CMOS technology in the ambient temperature range from 300 K down to 4.2 K. A custom test chip was designed and fabricated for measuring both the temperature rise in the MOSFET channel and in the surrounding silicon substrate, using the gate resistance and silicon diodes as sensors,...

Characterization and Compact Modeling of Nanometer CMOS Transistors at Deep-Cryogenic Temperatures

Cryogenic characterization and modeling of two nanometer bulk CMOS technologies (0.16-μm and 40-nm) are presented in this paper. Several devices from both technologies were extensively characterized at temperatures of 4 K and below. Based on a detailed understanding of the device physics at deep-cryogenic temperatures, a compact...