Generic and Orthogonal March Element based Memory BIST Engine

A Memory BIST architecture and implementation based on the novel concept of Generic and Orthogonal March Element

Development of a workload set for multi-core architectures

With the rise of multi-core chips in commodity hardware, the need for specialized workloads to evaluate the performance of multi-core systems has become apparent. The current generation of workloads used for evaluating multi-core systems often consist of sequential programs not capable of running on multiple processors and are therefore of...