A Deep Sub-Electron Temporal Noise CMOS Image Sensor with Adjustable sinc-type Filter to Achieve Photon Counting Capability

This letter introduces a Gm-cell-based CMOS image sensor (CIS) achieving deep subelectron noise performance. The CIS presents a new compensation block and low-noise current source to improve the performance of the Gm pixel. Furthermore, an optional first-order IIR filter is implemented to improve the output swing. The conversion gain, full...

A CMOS-Imager-Pixel-Based Temperature Sensor for Dark Current Compensation

This brief proposes employing each of the classical 4 transistor (4T) pinned photodiode (PPD) CMOS image sensor (CIS) pixels, for both imaging and temperature measurement, intended for compensating the CISs' dark current, and dark signal non-uniformity (DSNU). The proposed temperature sensors rely on the thermal behavior of MOSFETs working in...

Compensation for Process and Temperature Dependency in a CMOS Image Sensor

This paper analyzes and compensates for process and temperature dependency among a (Complementary Metal Oxide Semiconductor) CMOS image sensor (CIS) array. Both the analysis and compensation are supported with experimental results on the CIS’s dark current, dark signal non-uniformity (DSNU), and conversion gain (CG). To model and to...

A CMOS Image Sensor With In-Pixel Buried-Channel Source Follower and Optimized Row Selector

This paper presents a CMOS imager sensor with pinned-photodiode 4T active pixels which use in-pixel buried-channel source followers (SFs) and optimized row selectors. The test sensor has been fabricated in a 0.18-mum CMOS process. The sensor characterization was carried out successfully, and the results show that, compared with a regular imager...

Negative Offset Operation of Four-Transistor CMOS Image Pixels for Increased Well Capacity and Suppressed Dark Current

This letter presents an electrical method to reduce dark current as well as increase well capacity of four-transistor pixels in a CMOS image sensor, utilizing a small negative offset voltage to the gate of the transfer (TX) transistor particularly only when the TX transistor is off. As a result, using a commercial pixel in a 0.18 ?m CMOS process...