Searched for: subject%3A%22FPGA%22
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Vermij, E.P. (author)
Vanuit een groot aantal bedrijven is er een toenemende vraag naar snellere hardware. Het MOLEN-platform voorziet in die behoefte, doordat de architectuur bestaat uit een normale processor en een herprogrammeerbare chip. Hierdoor is een grote versnelling te behalen. Het omzetten van programmas naar deze architectuur is echter lastig en tijdrovend...
bachelor thesis 2007
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Chi, C.C. (author)
In this thesis a design report is given for implementing Voip functionality on a FPGA. More specifically, the Voip functionality is coded in software (C) and executed on a Nios II softcore. This NiosII is a Verilog description which is programmed onto the vga with the specific drivers for the audio codec and network controller.
bachelor thesis 2007
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Geursen, A.A.J. (author), Shirokov, V.A. (author), Petrarca, D.A. (author)
In deze thesis wordt een conceptontwerp geboden voor een product, die gebruik maakt van super e-paper. Super e-paper is een snel type van elektronisch papier met hoge resolutie. Elektronisch papier is een buigzaam beeldscherm, zonder backlighting, die alleen energie nodig heeft om het beeld te veranderen. Het beeld, eenmaal erop gezet, blijft...
bachelor thesis 2008
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Van der Net, M. (author)
Fingerprint identification or verification is used more often in civilian applications. In the near future, Automatic Fingerprint Identification Systems (AFIS) can be found on mobile phones or smartcards. Most AFIS are however computationally intensive, and are designed for execution on large systems such as PC's. The main bottleneck is the...
master thesis 2008
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Van As, T. (author)
Increasingly more computing power is being demanded in the domain of multimedia applications. Computer architectures based on reconfigurable hardware are becoming more popular now that classical drawbacks are diminishing. FPGA are constantly improving in terms of performance and area, and provide a technology platform that allows fast and...
master thesis 2008
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Taouil, M. (author)
One of the key kernels in scientific applications is the Sparse Matrix Vector Multiplication (SMVM). Profiling OpenFOAM, a sophisticated scientific Computational Fluid Dynamics tool, proved the SMVM to be its most computational intensive kernel. A traditional way to solve such computationally intensive problems in scientific applications is to...
master thesis 2009
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Van Wijnen, P.A. (author)
This thesis presents a feasibility analysis for hardware acceleration of the pattern recognition algorithms used by the Media Knowledge Engineering department at the Delft University of Technology. The feasibility analysis is conducted on a number of different algorithm classes. The Parzen Window algorithm appeared to be the most suitable option...
master thesis 2009
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Van der Leije, M.R. (author)
Unbalanced transaction can lead to addition and deletions in genes, which can be an indication of tumor cells. This is measured with array Comparative Genomic Hybridization. To find co-occurring aberrations in DNA, an algorithm was designed. However the execution takes days to find these DNA aberrations. This thesis proposes a partial FPGA based...
master thesis 2009
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Roumi, M. (author)
Feature extraction is a key function in various image processing applications. A feature is an image characteristic that can capture certain visual property of the image. Texture is an important feature of many image types, which is the pattern of information or arrangement of the structure found in a picture. Texture features are used in...
master thesis 2009
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Kranenburg, T. (author)
Due to the increasing number of processors which are integrated in System On Chips (SOCs) the need for robust, highly configurable processors emerged. Preliminary research showed that commercial processors are not suited for many research projects due to the fact that they are closed source and they can not be modified. Open source processors on...
master thesis 2009
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De Windt, J. (author)
Bus based interconnects are commonly used to connect Intellectual Properties (IPs) on System-on-Chip (SoC). However, as the number of high performance IPs with large communication requirements in a Multi Processor SoC (MPSoC) increases, the bus interconnects become a communication bottleneck. To overcome this limitation, the bus based...
master thesis 2009
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Thomas, A. (author)
IWEX stands for Invers Wavefield Extrapolation and is commonly used in seismic exploration. Niels Pörtzgen[15] showed that this technique can also be used for inspection of welds. This thesis describes two domains in which the IWEX algorithm can be calculated. The time domain which has a quantization problem and the frequency domain which is...
master thesis 2009
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Van der Sluijs, R. (author)
Inspections on transmission pipelines in the petrochemical industry are regularly conducted in order to guarantee safety of operations. Inspection devices are sent through the lines to record sensor data, this data needs to be post-processed in order to be able to make an analysis on the state of the pipeline. In this thesis, existing software...
master thesis 2010
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Lefter, M. (author)
Future space missions have to rely on advanced, smart and very light payloads in order to explore the solar system within a reasonable cost envelope. For this reason, efforts are made to obtain higher levels of integration that can reduce costs and allow the presence of more and more instruments on board of small spacecrafts. With the advent of...
master thesis 2010
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Zhang, L. (author)
Stereo matching has been widely used in many fields, such as viewpoint interpolation, feature detection system and free-view TV. However, the long processing time of stereo matching algorithms has been the major bottleneck that limits their real-time applications. During the past decades, many implementation platforms and corresponding algorithm...
master thesis 2010
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Seedorf, R.A.E. (author)
The speed gap between a processor realized in Semi-custom ASIC technology and a processor realized in FPGA technology is narrowing. In processor design, the approach is to define the microarchitecture of the processor and to design and implement it for executing an application domain. In this thesis, we have investigated the approach to design a...
master thesis 2010
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Brandon, A.A.C. (author)
In this thesis we describe a new generic approach for accelerating software functions using a reconfigurable device connected through a high-speed link to a general purpose system. In order for our solution to be generic, as opposed to related ISA extension approaches, we insert system calls into the original program to control the...
master thesis 2010
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Veerappan, C. (author)
Time-resolved image sensors enabling picosecond resolutions over large formats are needed in many advanced imaging fields, from fluorescence lifetime imaging microscopy (FLIM) to positron emission tomography (PET). Integrated single-photon avalanche diode (SPAD) technology embodies the new frontiers of time-resolved imaging, namely better...
master thesis 2010
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Escudero Martínez, M. (author)
Prototyping Systems on Chip (SoC) on FPGA technology improves the time that the de- signer needs to spend in the verification stage when developing new systems or upgrading the existing ones. However, FPGA prototyping is very challenging due to the few resources available in this chips, and often the large designs do not fit into one single FPGA...
master thesis 2010
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Kong, Q. (author)
In this thesis, we present a design of interrupt system upon an extensible and reconfigurable VLIW softcore processor: r-VEX. This interrupt system is designed and implemented in four mechanisms to match different application requirements in terms of the hardware consumption and performance issues (interrupt latency). On the other hand, due to...
master thesis 2011
Searched for: subject%3A%22FPGA%22
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