Optimizing the Cost and Performance for Batch jobs on HPC by Utilizing Swap Space

High Performance Computing (HPC) facilities play a crucial role in acceler- ating Electronic Design Automation (EDA) procedures at NXP Semiconduct- ors. The increasing number of job requests and workloads has led to a surge in memory demand, which is a costly resource. To address this, we leverage memory swap space on disk as a more affordable...

An adaptive memory allocatorfor better reallocation performance

Currently, the solution for dynamic memory reallocation is often left to a simple malloc-copy-free sequence. However, with the growing size of the memory object, this copying operation will have considerable CPU and memory costs before the content finishes its copy.<br/><br/>This report aims to achieve a nearly zero-copy reallocation scheme for...

Framing Programming Languages: Designing and Using a Frame-Based Virtual Machine

This thesis introduces the FrameVM virtual machine and the Framed language. This language gives developers a target to compile to which concisely follows the scopes-as-frames model. This model allows language developers to derive the memory model based on the scope graphs. The core building blocks of Framed are frames, which contain all data...

Enabling FPGA Memory Management for Big Data Applications Using Fletcher

vailability of FPGAs is increasing due to cloud service offerings. In the wake of a new in-memory storage format specification, Apache Arrow, FPGAs are increasingly interesting for data processing acceleration in the big data domain. The Fletcher framework can be used to easily develop FPGA accelerated applications that access data stored in...

Material Tracking System

For a steel company it is advantageous to be able to easily track steel through the production process. At Tata Steel this is currently done with the Material Tracking Table. However, generating this table takes months. Therefore a new system had to be developed. This paper describes the building of such a new system, which generates this...

Typesafe by Definition for Languages with Explicit Deallocation

A definitional interpreter is an interpreter which uses the semantics of its own host language to define those of its object language. Traditionally, a seperate type safety proof is used for such an interpreter. Using a "typesafe-by-construction" approach, where the typesafety is proven by expressing the type system of the object language in the...

Implementing Virtual Address Hardware Support on the ?-VEX Platform

The ?-VEX is a run-time reconfigurable Very Long Instruction Word (VLIW) processor. This unique processor allows separation of its issue lanes to form independently operating processing cores. Switching between these configuration during run-time allows optimizing the platform for the task(s) it is performing. Porting an Operating System (OS) to...