Deterministic Task Transfer in Network-on-Chip Based Multi-Core Processors

In this thesis we consider the application of multi-cores in safety critical real-time systems, especially avionics. In our literature study we extract two major challenges. Firstly the unpredictability that comes from the concurrent access of shared resources (especially the on-chip interconnect) must be dealt with. To address this we propose...

Orchestrating Mixed-Criticality Melody: Reconciling Energy with Safety for Mixed-Criticality Embedded Real-Time Systems

Embedded systems are getting into various domains of our daily life as well as in many of the highly sophisticated large systems, such as air planes, military tanks, rockets, satellites. These large systems consist of many modules which are executing umpteen number of tasks semi-independently. However, not all tasks have the same levels of...

Development of a workload set for multi-core architectures

With the rise of multi-core chips in commodity hardware, the need for specialized workloads to evaluate the performance of multi-core systems has become apparent. The current generation of workloads used for evaluating multi-core systems often consist of sequential programs not capable of running on multiple processors and are therefore of...

An Adaptive Defect-Tolerant Multiprocessor Array Architecture

Recent trends in transistor technology have dictated the constant reduction of device size. One negative effect stemming from the reduction in size and increased complexity is reduced reliability. This thesis is centered around the matter of fault recovery, in the subject of device fault-tolerance, and graceful system degradation in the presence...

Automated Multi-core Scheduling for an Industrial-sized Mechatronic Motion Control Platform

Mechatronic embedded control systems are becoming increasingly sophisticated and computationally demanding. These systems typically consists of multiple controllers, which coordinate the actuators and apply feedback based on data collected by sensors. Often the underlying control strategy is entirely described in a software application, which...

Performance Improvement of Optical Algorithms on Multicore Platforms

ASML is one of the world's largest suppliers of lithography systems for the semiconductor industry. ASML designs and develops machines that are used to print circuits on silicon wafers, to produce IC chips. These circuits have to be printed with accuracy of up to 2nm. For this purpose, the machines incorporate several measurement systems. The...

Design and analysis of a coherent memory sub-system for FPGA-based embedded systems

Cache coherence and memory consistency are of the most decisive and challenging issues in the design of shared-memory multi-core systems that influence both the correctness and performance of parallel programs. In this thesis, we identify and analyze the problem of designing a coherent/consistent memory subsystem in general and then focus on...

Accelerating Computational Electromagnetic Diffraction Model on Programmable Graphics Processors

This thesis is done in the framework of wafer metrology to accelerate an electromagnetic diffraction model (EDM), which is used to measure the profile on a wafer, on programmable graphics processors (GPU). The main focus of this thesis is to investigate the suitability of EDM to GPU architectures. This study contributes with statistical data and...

Schedulability analysis of limited-preemptive moldable gang tasks

Gang scheduling, has long been adopted by the high-performance computing community as a way to reduce the synchronization overhead between related threads. Gang schedulling allows for several threads to execute in lock steps without suffering from long busy-wait periods or be penalised by large context-switch overheads. If several threads use...

VHDL Implementation of 4096-bit RNS Montgomery Modular Exponentiation for RSA Encryption

Modular exponentiation is the basis needed to perform RSA encryption and decryption. Execution of 4096-bit modular exponentiation using an embedded system requires many arithmetic operations. This work aims to improve the performance of modular exponentiation for an existing FPGA platform containing a soft core RISC-V processor. The solution is...

Techniques for Memory Mapping on Multi-Core Automotive Embedded Systems

The demand to increase performance while conserving power has led to the invention of multi-core systems. The software until now had the convenience of gaining better performance over faster processors without any need for a change. The advances in the multi-core hardware have shifted the responsibility of software performance from hardware...

Multi-core architecture for anonymous Internet streaming

There are two key components for high throughput distributed anonymizing applications. The first key component is overhead due to message complexity of the utilized algorithms. The second key component is an nonscalable architecture to deal with this high throughput. These issues are compounded by the need for anonymization. Using a state of the...