Low power IC design characterization techniques under process variations

To overcome the increasing sensitivity to variability in nanoscale integrated circuits, operation parameters (e.g., supply voltage) are adapted in a customized way exclusively to each chip. AVS is a standard industrial technique which has been adopted widely to compensate for process, voltage, and temperature variations as well as power...

Transistor-Level Statistical Timing Analysis: Solving Random Differential Equations Directly

In this Ph.D. thesis, a novel non-MC Random differential Equation based Statistical Timing Analysis (RESTA) method is proposed, which considers both process variations and electrical circuit effects, such as multiple input simultaneous switching and crosstalk effects. To make the approach practical for analysis of large circuits at high accuracy...