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A Reconfigurable Ultrasound Transceiver ASIC With 24 x 40 Elements for 3-D Carotid Artery Imaging
A Reconfigurable Ultrasound Transceiver ASIC With 24 x 40 Elements for 3-D Carotid Artery Imaging
Reliability, Efficiency and Cost Trade-offs for Medium Voltage Distribution Network Expansion using Refurbished AC-DC Reconfigurable Links
Reliability, Efficiency and Cost Trade-offs for Medium Voltage Distribution Network Expansion using Refurbished AC-DC Reconfigurable Links
AC Distribution Grid Reconfiguration using Flexible DC Link Architecture for Increasing Power Delivery Capacity during (n-1) Contingency
AC Distribution Grid Reconfiguration using Flexible DC Link Architecture for Increasing Power Delivery Capacity during (n-1) Contingency
Mission-Driven Resource Management for Reconfigurable Sensing Systems
Mission-Driven Resource Management for Reconfigurable Sensing Systems
Reconfigurable DC Links for Restructuring Existing Medium Voltage AC Distribution Grids
Reconfigurable DC Links for Restructuring Existing Medium Voltage AC Distribution Grids
Architecture for Emergent Craftsmanship
Architecture for Emergent Craftsmanship: Digitally manufactured, mass customized and reconfigurable workshops for makers
L/S-Band Frequency Reconfigurable Multiscale Phased Array Antenna With Wide Angle Scanning
L/S-Band Frequency Reconfigurable Multiscale Phased Array Antenna With Wide Angle Scanning
EasySRRobot
EasySRRobot: An Easy-to-Build Self-Reconfigurable Robot with Optimized Design
Power-assisted dynamic soaring for a reconfigurable Unmanned Aerial Vehicle
Power-assisted dynamic soaring for a reconfigurable Unmanned Aerial Vehicle
A Cryogenic 1 GSa/s, Soft-Core FPGA ADC for Quantum Computing Applications
A Cryogenic 1 GSa/s, Soft-Core FPGA ADC for Quantum Computing Applications
Static Balancing of Single Loop Reconfigurable Mechanisms
Static Balancing of Single Loop Reconfigurable Mechanisms
A Dynamically Reconfigurable VLIW Processor and Cache Design with Precise Trap and Debug Support
A Dynamically Reconfigurable VLIW Processor and Cache Design with Precise Trap and Debug Support
Implementing Virtual Address Hardware Support on the ?-VEX Platform
Implementing Virtual Address Hardware Support on the ?-VEX Platform
Acceleration of read alignment with coherent attached FPGA coprocessors
Acceleration of read alignment with coherent attached FPGA coprocessors
Antennas for Frequency Reconfigurable Phased Arrays
Antennas for Frequency Reconfigurable Phased Arrays
Mission-driven Resource Management for Reconfigurable Sensing Systems
Mission-driven Resource Management for Reconfigurable Sensing Systems
Task Scheduling for Adaptive Reconfigurable VLIW Multicore Processors
Task Scheduling for Adaptive Reconfigurable VLIW Multicore Processors
Multithreading for Embedded Reconfigurable Multicore Systems
Multithreading for Embedded Reconfigurable Multicore Systems
Model and Sensor Based Nonlinear Adaptive Flight Control with Online System Identification
Model and Sensor Based Nonlinear Adaptive Flight Control with Online System Identification
A Low Power System-on-Chip with Memory Stacked on Top of Logic
A Low Power System-on-Chip with Memory Stacked on Top of Logic
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