Run-Time Partial Reconfiguration on the Virtex-II Pro

Reconfigurable Computing entails the utilization of a general-purpose processor augmented with a reconfigurable hardware structure (e.g. a field-programmable gate array). Normally, a complete reconfiguration is needed to cha nge the functionality of the FPGA even when the change is only minor. Moreover, the complete chip needs to be halted to...

The Molen compiler for reconfigurable architectures

In this dissertation, we present the Molen compiler framework that targets reconfigurable architectures under the Molen Programming Paradigm. More specifically, we introduce a set of compiler optimizations that address one of the main shortcomings of the reconfigurable architectures, namely the reconfiguration overhead. The proposed...

Scalable Multigigabit Pattern Matching for Packet Inspection

In this paper, we consider hardware-based scanning and analyzing packets payload in order to detect hazardous contents.We present two pattern matching techniques to compare incoming packets against intrusion detection search patterns. The first approach, decoded partial CAM (DpCAM), predecodes incoming characters, aligns the decoded data, and...

A Quantitative Model for Hardware/Software Partitioning

Heterogeneous System Development needs Hardware/Software Partitioning performed early on in the development process. In order to do this early on predictions of hardware resource usage and delay are necessary. In this thesis a Quantitative Model is presented that can make early predictions to support the partitioning process. The model is based...

The Molen Polymorphic Media Processor

In this dissertation, we address high performance media processing based on a tightly coupled co-processor architectural paradigm. More specifically, we introduce a reconfigurable media augmentation of a general purpose processor and implement it into a fully operational processor prototype. The proposed media Molen prototype is implemented on...

The rho-trimedia processor

Microcoded Reconfigurable Embedded Processors