Searched for: subject%3A%22reconfiguration%22
(81 - 100 of 127)

Pages

document
Tohidian, M. (author), Madadi, I. (author), Staszewski, R.B. (author)
In this paper, we propose a discrete-time IIR low-pass filter that achieves a high-order of filtering through a charge-sharing rotation. Its sampling rate is then multiplied through pipelining. The first stage of the filter can operate in either a voltage-sampling or charge-sampling mode. It uses switches, capacitors and a simple gm-cell, rather...
journal article 2014
document
Reda, M.B. (author)
The ?-VEX processor is a parameterized reconfigurable Very Large Instruction Word (VLIW) softcore processor. It can be reconfigured in the issue-width, number and type of functional units (FUs), width of memory buses and number of registers in the multi- ported register file. The current design of the ?-VEX processor supports single cluster...
master thesis 2014
document
Nane, R. (author)
Reconfigurable Architectures (RA) have been gaining popularity rapidly in the last decade for two reasons. First, processor clock frequencies reached threshold values past which power dissipation becomes a very difficult problem to solve. As a consequence, alternatives were sought to keep improving the system performance. Second, because Field...
doctoral thesis 2014
document
Hoozemans, J.J. (author)
This thesis describes the design and implementation of an FPGA-based hardware platform based on the rVEX VLIW softcore and the adaption of a Linux 2.0 no_mmu kernel to run on that platform. The rVEX is a runtime reconfigurable VLIW softcore processor. It supports various configurations that allow programs to run faster or more efficient. The...
master thesis 2014
document
Bus, P. (author)
This paper presents the results of partial research in the area of designing processes and methods of spatial and social interaction of multi-agent system with its environment in the city urban structure. According to the logic defined by the intrinsic rules of the simulation model of the selected area,there will be verified and tested the...
conference paper 2013
document
Nadeem, M.F. (author)
In this dissertation, we propose the design of a simulation framework to investigate the performance of reconfigurable processors in distributed systems. The framework incorporates the partial reconfigurable functionality of the reconfigurable nodes. Depending on the available reconfigurable area, each node is able to execute more than one task...
doctoral thesis 2013
document
Anjam, F. (author)
In this dissertation, we propose to combine programmability with reconfigurability by implementing an adaptable programmable VLIW processor in a reconfigurable hardware. The approach allows applications to be developed at high-level (C language level), while at the same time, the processor organization can be adapted to the specific requirements...
doctoral thesis 2013
document
Yan, Y. (author)
This thesis discusses the theory, architecture design, circuit design and measurements of an ultra-low-energy reconfigurable interface circuit for resonant gas sensors. This interface circuit employs a transient measurement method. The resonant sensor is driven at a frequency close to its resonance frequency by an excitation source that is...
master thesis 2013
document
Neijzen, R. (author)
Project in the studio of Border Conditions. A proposal for a reconfigurable and transformable low-tech building system for the Cañada Real Galiana in Madrid. The project consist of small building units, used for market, climbing and habitat. The structures are made out of recycled wood. The project is fixes in the Cañada Real Galiana, a strip of...
master thesis 2013
document
De Haan, S.H.W. (author)
The proposed location for a tranferium within Pampus, a new extension of Almere, is subject to long term, short term and 24/7 changes. As a solution to this changing environment this project proposes an architecture that is reconfigurable based on actual demands and constraints. These serve as input for a tool that renders architectural...
master thesis 2013
document
Basterrechea, I. (author)
This research graduation project aims to explore the possibilities of reconfigurable architecture as a response to the issue of designing for the uncertainty. A keen interest in computational tools as a powerful way to analyse, measure and materialize a Media Center at the NDSM (Amsterdam).
master thesis 2013
document
Ostadzadeh, S.A. (author)
Recent trends show a steady increase in the utilization of heterogeneous multicore architectures in order to address the ever-growing need for computing performance. These emerging architectures pose specific challenges with regard to their programmability. In addition, they require efficient application mapping schemes to fully harness their...
doctoral thesis 2012
document
Meeuws, R.J. (author)
Hardware estimation is an important factor in Hardware/Software Co-design. In this dissertation, we present the Quipu Modeling Approach, a high-level quantitative prediction model for HW/SW Partitioning using statistical methods. Our approach uses linear regression between software complexity metrics and hardware characteristics. The resulting...
doctoral thesis 2012
document
Sima, V.M. (author)
In this dissertation, we address the problem of runtime adaptation of the application to its execution environment. A typical example is changing theprocessing element on which a computation is executed, considering the available processing elements in the system. This is done based on the information and instrumentation provided by the compiler...
doctoral thesis 2012
document
Viswanathan, V. (author)
Dynamically reconfigurable architectures have demonstrated superior performance in comparison to the general-purpose processors. This thesis describes a generic approach for Dynamic Partial Reconfiguration (DPR) of a reconfigurable platform, connected to a general purpose system through a high-speed interconnect. Thus, the system can dynamically...
master thesis 2011
document
Khizakanchery Natarajan, S.N. (author)
Recent developments in the Dynamic and Partial Reconfigurable Computing requires the presence of Operating System (OS) services like scheduler, placer, reconfiguration manager etc to manage the run-time activities in the reconfigurable resource. In this thesis, we address the Inter-Task communication, which is one of the OS services required to...
master thesis 2011
document
Dechesne, F. (author), Van den Hoven, M.J. (author), Warnier, M.E. (author)
With the increasing use of information technology for different societal goals, the demand for flexible and multiple-functionality appliances has risen. Making technology reconfigurable could be a way of achieving this. This working paper is written against the background of a large scale research project developing reconfigurable sensors in...
conference paper 2011
document
Van den Berg, R.S. (author)
A wireless sensor network (WSN) consists of multiple small and simple computers (nodes), whose performance is tightly linked to its unpredictable deployment environment. It is nearly impossible to design a WSN that performs well in every scenario; instead they are developed for a specific context, with performance rapidly decreasing when...
master thesis 2011
document
Lu, Y. (author)
In this dissertation, we focus our research on the problems related to efficient configurable resource management for partially reconfigurable systems. FPGA devices are used to build such systems for various application domains with telecommunication and energy efficient high performance computing being two prominent examples. Dynamic management...
doctoral thesis 2011
document
Marconi, T. (author)
Runtime reconfigurable systems built upon devices with partial reconfiguration can provide reduction in overall hardware area, power efficiency, and economic cost in addition to the performance improvements due to better customization. However, the users of such systems have to be able to afford some additional costs compared to hardwired...
doctoral thesis 2011
Searched for: subject%3A%22reconfiguration%22
(81 - 100 of 127)

Pages