RAESCY: A power side channel assessment framework for pre and post-silicon evaluation

Demand for smart, Internet-connected devices and other electronics has increased dramatically in recent years. This increase in demand for technological devices, driven by advancements in Artificial Intelligence (AI), the Internet of Things (IoT), and autonomous systems, has exposed the digital system to potential security threats. As more...

A Dynamically Reconfigurable Recursive Switched-Capacitor DC-DC Converter with Adaptive Load Ability Enhancement

Multiple voltage conversion ratio (VCR) recursive switched-capacitor (SC) dc-dc converters, based on several basic 2:1 converters, are widely used for on-chip power supplies due to their flexible VCRs for higher energy efficiency. However, conventional multiple VCR SC converters usually have one or more 2:1 converters unused for some VCRs,...

A Crystal-Less Clock Generation Technique for Battery-Free Wireless Systems

The size of wireless systems is required to be reduced in many applications, such as ultra-low-power sensor nodes and wearable/implantable devices, where battery and crystal are the two main bottlenecks in system miniaturization. In recent years, battery-free radios based on wireless power transfer (WPT) have shown great potential in...

On the Effect of Clock Frequency on Voltage and Electromagnetic Fault Injection

We investigate the influence of clock frequency on the success rate of a fault injection attack. In particular, we examine the success rate of voltage and electromagnetic fault attacks for varying clock frequencies. Using three different tests that cover different components of a System-on-Chip, we perform fault injection while its CPU...

A 16 MHz CMOS RC Frequency Reference With ±90 ppm Inaccuracy From -45 °C to 85 °C

This article presents a 16-MHz RC frequency reference implemented in a standard 180-nm CMOS process. It consists of a frequency-locked loop (FLL) in which the output frequency of a digitally controlled oscillator (DCO) is locked to the frequency-phase characteristic of a Wien bridge RC filter. Since it is made from on-chip resistors and...

A BJT-Based Temperature-to-Digital Converter With a 0.25 C 3 $\sigma$ -Inaccuracy From-40 C to 180 C Using Heater-Assisted Voltage Calibration

This article presents a BJT-based temperature-to-digital-converter (TDC) that achieves ±0.25 °C 3 sigma -inaccuracy from -40 °C to +180 °C after a heater-assisted voltage calibration (HA-VCAL). Its switched-capacitor (SC) ADC employs two sampling capacitors and, thus, the minimum number of critical sampling switches, which minimizes the...

An On-Chip Self-Characterization of a Digital-to-Time Converter by Embedding it in a First-Order ΔΣ Loop

To characterize an on-chip programmable delay in a low-cost and high-resolution manner, a built-in self-test based on a first-order ΔΣ time-to-digital converter with self-calibration is proposed and implemented in TSMC 28-nm CMOS. The system is self-contained, and only one digital clock is needed for the measurements. A...

Pulse-Based Modulation for VLC Systems: Using Programmable Systems-on-Chip

The use of Light Emitting Diodes (LED) as a main source of illumination<br/>can help in significantly reducing global energy conspumtions. The LED is<br/>well suited for modulating visible light, enabling a wireless communication<br/>channel. A popular topic in Visible Light Communication (VLC) research<br/>is to push data throughput past the...

Efficiency and Bandwidth Enhancement of On-Chip Antennas by Using Connected Arrays and Artificial Dielectrics

On-chip antennas operating in the THz frequency range are characterized by narrow bandwidth and poor radiation efficiency. This is because they are electrically very close to the ground plane that is used to shield the antenna from the lossy substrate. In this work we propose a novel approach to increase the efficiency and the bandwidth of...

Toward Solving Multichannel RF-SoC Integration Issues Through Digital Fractional Division

In modern RF system on chips (SoCs), the digital content consumes up to 85% of the IC chip area. The recent push to integrate multiple RF-SoC cores is met with heavy resistance by the remaining RF/analog circuitry, which creates numerous strong aggressors and weak victims leading to RF performance degradation. A key such mechanism is injection...

Built-In Measurements in Low-Cost Digital-RF Transceivers

Digital RF solutions have been shown to be advantageous in various design aspects, such as accurate modeling, design reuse, and scaling when migrating to the next CMOS process node. Consequently, the majority of new low-cost and feature cell phones are now based on this approach. However, another equally important aspect of this approach to...

Design of a Crypto Core for Securing Intra System-on-Chip Communication

Interconnect centric security in multi core System-on-Chip (SoC) is an area of increasing concern. Monitoring and manipulation of the SoC interconnect yields great potential to bypass higher level security mechanisms. This thesis proposes SoC-TLS: a cryptographic hardware solution aimed to protect intra SoC communication against malicious IP and...

An Off-Chip Bridge for On-Chip Network-Based Systems Supporting Traffic Quality of Service

Prototyping Systems on Chip (SoC) on FPGA technology improves the time that the de- signer needs to spend in the verification stage when developing new systems or upgrading the existing ones. However, FPGA prototyping is very challenging due to the few resources available in this chips, and often the large designs do not fit into one single FPGA...

Bandwidth Analysis of Functional Interconnects Used as Test Access Mechanism

Test data travels through a System on Chip (SOC) from the chip pins to the Core-Under-Test (CUT) and vice versa via a Test Access Mechanism (TAM). Conventionally, a TAM is implemented using dedicated communication infrastructure. However, also existing functional interconnect, such as a bus or Network on Chip (NOC), can be reused as TAM; this...

Protocol conversions for the Aethereal Networks-on-Chip

Bus based interconnects are commonly used to connect Intellectual Properties (IPs) on System-on-Chip (SoC). However, as the number of high performance IPs with large communication requirements in a Multi Processor SoC (MPSoC) increases, the bus interconnects become a communication bottleneck. To overcome this limitation, the bus based...

Design of a Portable and Customizable Microprocessor for Rapid System Prototyping

Due to the increasing number of processors which are integrated in System On Chips (SOCs) the need for robust, highly configurable processors emerged. Preliminary research showed that commercial processors are not suited for many research projects due to the fact that they are closed source and they can not be modified. Open source processors on...