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Marijn Boringa
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The increasing digitalization of the power grid and widespread adoption of the IEC 61850 standard have raised concerns regarding the cyber security of electrical substations. In particular, the Sampled Values (SV) protocol lacks inherent security mechanisms, leaving protection and control functions vulnerable to malicious SV frames injection. To address this challenge, a method using hybrid statistical-deep learning was previously proposed to detect, prevent, and localize SV injection attacks in digital substations, while ensuring minimal latency and near-zero false positives. In this work, we evaluate and experimentally validate the real-time implementation of the proposed Intrusion Prevention System (IPS) using a hardware-in-the-loop testbed consisting of a Real-Time Digital Simulator (RTDS), Raspberry Pi implementing the intrusion prevention method, and an industrial intelligent electronic device. Multiple operating scenarios are considered to evaluate fault clearance latency, communication reliability, IPS classification performance, and IPS impact on protection schemes. Results demonstrate that the IPS introduces less than 150 μs of additional delay, achieves a near-zero false positive rate in the absence of cyber attacks, and attains an F1-score above 99% in preventing SV injection attacks, while preserving substation protection and control functionalities. These findings confirm the practicality and effectiveness of the proposed IPS for deployment in IEC 61850-compliant digital substations.
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The increasing digitalization of the power grid and widespread adoption of the IEC 61850 standard have raised concerns regarding the cyber security of electrical substations. In particular, the Sampled Values (SV) protocol lacks inherent security mechanisms, leaving protection and control functions vulnerable to malicious SV frames injection. To address this challenge, a method using hybrid statistical-deep learning was previously proposed to detect, prevent, and localize SV injection attacks in digital substations, while ensuring minimal latency and near-zero false positives. In this work, we evaluate and experimentally validate the real-time implementation of the proposed Intrusion Prevention System (IPS) using a hardware-in-the-loop testbed consisting of a Real-Time Digital Simulator (RTDS), Raspberry Pi implementing the intrusion prevention method, and an industrial intelligent electronic device. Multiple operating scenarios are considered to evaluate fault clearance latency, communication reliability, IPS classification performance, and IPS impact on protection schemes. Results demonstrate that the IPS introduces less than 150 μs of additional delay, achieves a near-zero false positive rate in the absence of cyber attacks, and attains an F1-score above 99% in preventing SV injection attacks, while preserving substation protection and control functionalities. These findings confirm the practicality and effectiveness of the proposed IPS for deployment in IEC 61850-compliant digital substations.