Traditional packaging materials such as solder paste were studied for decades, which is possible to detect initial cracks for a reliability lifetime estimation. While novel die-attach materials such as sintered silver are developing towards higher working temperature and higher current density, it is not clear whether initial cracks are also helpful for reliability assessment. Therefore, in this work, a series of FEM simulations were established for a response surface model with power electronics chip sizes to predict sintered silver joint reliability. Impact factors for resistance were analyzed and compared such as die size and the thickness of the joint. Sintered silver layer sandwiched by copper substrate and terminals with constant current supply was generated and simulated for resistance fluctuation. Through the high-precision DC resistance measurement setup based on the four-probe method, the resistance over ${50 \mathrm{n}\Omega}$ is possible to detect, thus lead to crack growth. In order to study the geometry sensitivity of cracks, preset arc-shape cracks were modeled to simulate crack generation. The coupling of resistance and crack were analyzed through von Mise strain distribution. With a proper geometric configuration of the die-attach layer, it is possible to minimize the testing time for new joint materials through a high precision electrical resistance measurement and simulation-assisted models.@en