To fulfill the vision of scalable quantum computers, cryogenic CMOS is a promising technology to implement the electronic interface for large-scale quantum processors. Research over the years has shown performance improvements in CMOS transistors in commercially viable technology at cryogenic temperatures. While the physics behind the operation of CMOS transistors in cryogenic temperature is known to a great extent, a full-scale compact model is yet not widely available for deep cryogenic temperatures at which qubits operate. For the design of circuits that can be placed in close proximity to qubits, a compatible model needs to be built. In recent years some effort has been made in this direction but most of these are related to DC behavior of the transistor. Very limited work is available that model the RF behavior of transistors at cryogenic temperature across a wide range of bias conditions. As an alternative to a complex physics-based compact model, in this work, we have explored the use of artificial neural networks to model the behavior of CMOS transistors in advanced technology nodes. While a non-linear charge-based model using Adjoint-ANN for deep cryogenic temperature has already been shown as an effective approach, we extend the idea of using ANN to facilitate a model of the CMOS transistors. Transistors from 22nm FDSOI technology were characterized for their S-parameter response at room temperature and 4K for this work.