This paper introduces a novel single-loop control scheme for voltage regulation in islanded inverters, using a proportional-integral-lead (PI-Lead) controller designed within the synchronous reference frame (SRF) through a loop-shaping approach. Commonly, dual-loop controllers have been employed for this purpose owing to several limitations, such as insufficient stability with a narrow gain margin, a trade-off between stability and bandwidth, and constrained bandwidth due to the need for a significantly lower outer voltage loop bandwidth compared to the inner current one. The proposed method overcomes these challenges by integrating a Lead compensator, which enhances voltage regulation by eliminating steady-state error, improving stability margins, and providing a fast transient response while maintaining robustness against model parameter variations. Additionally, the control strategy reduces dependence on current measurements, except when dealing with inductive loads where virtual resistor-based active damping is necessary. Despite the challenges posed by multi-resonance phenomena and coupling effects inherent in single-loop SRF-based modeling, a comprehensive frequency-domain analysis is performed, with systematic controller parameter design guidelines to mitigate multi-gain crossover issues. Rigorous experimental results validate the theoretical findings and simulations, demonstrating the superior performance and practical effectiveness of the proposed control strategy compared to existing methods.

The Crossover Switches Cell (CSC) is a recent Single DC-Source Multilevel Inverter (SDCS-MLI) topology with boosting abilities. In grid-connected PV applications, the CSC should be controlled to inject a sinusoidal current to the grid with low THD% and unity power factor, while balancing the capacitor voltage around its reference. These two objectives can be met through the application of a finite control set model predictive control (FCS-MPC) method. Thus, this paper proposes a design of an optimized FCS-MPC for a 9-level grid-tied CSC inverter. The switching actions are optimized using the redundant switching states. The design is verified through simulations and real-time implementation. The presented results show that the THD% of the grid current is 1.73%, and the capacitor voltage is maintained around its reference with less than 0.5 V mean error. To test the reliability of the control design, different scenarios were applied, including variations in the control reference values as well as the AC grid voltage. The presented results prove the good performance of the designed controller in tracking the reference values and minimizing the steady-state errors.