Thermoelectric behavior of microchannel plates fabricated by photo-assisted electrochemical etching

Process technology of high-aspect-ratio silicon beams for stretchable silicon electronics

Stretchable mesh copper interconnect for batc fabrication of array-type microsystems

Mesh interconnects for silicone embedded stretchable silicon electronics

Silicon micromachining of high-aspect ratio, high-density through-wafer electrical interconnects for 3D multichip packaging

Electronics on deformable ultra-thin substrates

Through-chip connections

Gel-layer-assisted directional electropolymerization: a versatile method for high-resolution volume and surface patterning of flexible substrates with conjugated polymers

Polymer interconnections for 3D-chip stacking technology: directional volume patterning of flexible substrates with conducting polymer wires

Micro-patterning of self-supporting layers with conducting polymer wires for 3D-chip interconnecting applications

High aspect ratio through-wafer interconnections for 3D-microsystems

Through-wafer electrical vias for RF silicon technology

Wafer thinning for high-density, through-wafer interconnects

Micromechanical modeling of stress evolution induced during cure in a particle-filled electronic packaging polymer

3D molecular interconnection technology

Thinning of micromachined wafers for high-density, through-wafer interconnects

Wafer thinning for highly dense 3D electronic structures

Design and construction of elements of a hybrid molecular/electronic Retina-Cortex structure (CORTEX)

Report on wafer thinning technologies: WP 4 (CORTEX)