Metal-oxide-semiconductor field-effect transistors (MOSFETs) undergo fatigue degradation under high thermal and electrical stresses. This process results in changes in their parasitic parameters, which can be detected using frequency domain reflectometry (FDR). Frequency domain impedance analysis is employed to characterize the various quality states of Si and SiC MOSFETs obtained from accelerated aging experiments. Results demonstrate a consistent increase in parasitic resistance as the devices degrade. By determining the drain-source parasitic resistance at the self-resonant frequency (f_ SRF) and the drain-source on-resistance for MOSFETs with varying degradation degrees, positive linear numerical fitting equations (14)-(15) are established to predict MOSFET degradation under zero DC bias voltage. In addition, FDR technology is used to identify the drain parasitic resistance at the f_ SRF of MOSFET samples with different sizes of defects in the sintered silver layer. These results reveal a positive correlation between the quality of the sintered silver layer and Rrm DSRF. The proposed approach is an effective quality screening technology for power semiconductor devices without requiring power-on treatment.