Analog to digital converters (ADCs) are critical blocks in most signal processing chains. Especially in low bandwidth applications, there exists a need to digitize signals with high resolution and accuracy, while at the same time, expending minimum energy. This thesis presents a dynamic zoom ADC for use in such applications. The zoom ADC employs a high-speed asynchronous SAR ADC which works in tandem with a fully differential ΔΣ ADC. Fabricated in a 0.16-μm CMOS process, the prototype occupies 0.26 mm2 and achieves 119.1 dB peak SNR, 118.1 dB peak SNDR and 120.3 dB dynamic range in a 1 kHz bandwidth, while consuming 280 μW; resulting in a Schreier FoM of 185.8 dB.

This article presents a Class-D audio amplifier for automotive applications. Low electromagnetic interference (EMI) and, hence, smaller LC filter size are obtained by employing a fully differential multilevel output stage switching at 4.2 MHz. A modulation scheme with minimal switching activity at zero input reduces idle power, which is further assisted by a gate-charge reuse scheme. It also achieves high linearity due to the high loop gain realized by a third-order feedback loop with a bandwidth of 800 kHz. The prototype, fabricated in a 180-nm high-voltage BCD process, achieves a minimum THD+N of -107.8 dB/-102 dB and a peak efficiency of 91%/87% with 8- and 4-Ω loads, respectively, while drawing 7-mA quiescent current from a 14.4-V supply. The prototype meets the CISPR 25 Class 5 EMI standard with a 5.7-dB margin using an LC filter with a cutoff frequency of 580 kHz.@en