TM
Thomas Mausolf
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1
Conference paper
(2024)
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Aniello Franzese, Batuhan Sutbas, Corrado Carta, Thomas Mausolf, Nicolò Moroni, Renato Negra, Alfredo Sánchez Ramos, Francesco Greco, Luigi Boccia, Ehsan Shokrolahzade, Marco Spirito
This work describes accurate methods for the characterization of sub-terahertz (sub-THz) devices and pad de-embedding procedures. The extraction of the intrinsic DUT is enabled by generating a precise pad model using two-tier calibration approaches. Moreover, the proposed approaches offer a solution to the designers to preserve precious silicon area by presenting a simplified and potentially parameterizable pad model. Employing two different thru-reflect-line (TRL) calibration kits (calKits) together with the DUT on the same die, this research validates the proposed calibration strategies. This paper uses as DUT at J-band, i.e. a Marchand balun, fabricated using IHP SiGe BiCMOS technology with an aluminum back-end-of-line (BEOL), alongside the mentioned calKits. The goal of the paper is to assess the performance of the DUT and validate two de-embedding methods. Moreover, the pad model offers a way for accurate DUT characterization saving silicon area for future optimized designs.
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This work describes accurate methods for the characterization of sub-terahertz (sub-THz) devices and pad de-embedding procedures. The extraction of the intrinsic DUT is enabled by generating a precise pad model using two-tier calibration approaches. Moreover, the proposed approaches offer a solution to the designers to preserve precious silicon area by presenting a simplified and potentially parameterizable pad model. Employing two different thru-reflect-line (TRL) calibration kits (calKits) together with the DUT on the same die, this research validates the proposed calibration strategies. This paper uses as DUT at J-band, i.e. a Marchand balun, fabricated using IHP SiGe BiCMOS technology with an aluminum back-end-of-line (BEOL), alongside the mentioned calKits. The goal of the paper is to assess the performance of the DUT and validate two de-embedding methods. Moreover, the pad model offers a way for accurate DUT characterization saving silicon area for future optimized designs.