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C Weis

Conference paper (4)

4 records found

1

Exploiting expendable process-margins in DRAMs for run-time performance optimization

Conference paper (2014) - K Chandrasekar (author) , S Goossens (author) , C Weis (author) , M Koedam (author) , Benny Akesson (author) , N Wehn (author) , Kees Goossens (author)

System and circuit level power modeling of energy-efficient 3D-stacked wide I/O DRAMs

Conference paper (2013) - K Chandrasekar (author) , C Weis (author) , B Akesson (author) , N Wehn (author) , Kees Goossens (author)

TLM modelling of 3D stacked wide I/O DRAM Subsystems

Conference paper (2013) - M Jung (author) , C Weis (author) , N Wehn (author) , K. Chandrasekar (author)

Towards variation-aware system-level power estimation of DRAMs: an empirical approach

Conference paper (2013) - K Chandrasekar (author) , C Weis (author) , B Akesson (author) , N Wehn (author) , Kees Goossens (author)