Trade offs in the design of a router with guaranteed and best-effort services for networks on chip

A inified approach to mapping and routing on a network-on-chip for both best-effort and guaranteed service traffic

Mapping and configuration methods for multi-use-case networks on chips

Transaction monitoring in networks on-chip: the on-chip run-time perspective

A methodology for mapping multiple use-cases onto networks on chips

A buffer-sizing algorithm for networks in chip using TDMA and credit-based end-to-end flow control

Low-cost task scheduling for distributed-memory machines

CPR: mixed task and data parallel scheduling for distributed systems

Compile-time scheduling for distributed-memory systems

A low-cost approach towards mixed task and data parallel scheduling

CPR: Mixed Task and Data Parallel Scheduling for Distributed Systems.

Fast and effective task scheduling in heterogeous systems

The distributed ASCI supercomputer project

The distributed ASCI supercomputer project

Preemptive task scheduling for distributed systems

Improving processor selection complexity in list scheduling algorithms

LLB: a fast and effective scheduling algorithm for distributed-memory systems

List scheduling complexity revisited

On the complexity of list scheduling algorithms for distributed-memory systems

FLB: Fast Load Balancing for distributed-memory machines