A low-power class-AB amplifier for high-fidelity headphones is presented. The linearity of a class-AB amplifier strongly depends on the loop gain over the audio band and voltage swing. In this paper, a cascode-driven mesh technique limits the number of high-swing nodes in the output stage, thereby preserving the loop gain of the preceding gain stages. A frequency compensation scheme is proposed that extends the unity-gain bandwidth (UGB) and increases the loop gain at 20 kHz. Combining these two techniques, the amplifier achieves -101.4-dB total harmonic distortion plus noise (THD+N) over the full audio band, the lowest ever reported nonlinearity among sub-milliwatt CMOS class-AB amplifiers. The amplifier delivers 51.2-mW peak power to a 16Ω 0.33 -nF load while consuming 0.97 mW of total static power. It has UGB of 12.3 MHz and SNR of 108 dB. These results are consistent when measured over eight test chips. Compared to the recent prior art, the amplifier exhibits >12 dB better linearity and >14-dB dynamic range. This results in 2.5 × improvement in figure of merit (FOM = Peak Load Power/(Quiescent Power × THD+N[%])). It occupies 0.16 mm ² in a standard 65-nm CMOS.

This paper presents a class-AB driver for high-fidelity audio. It attains high-linearity at low-power by using an improved output stage biasing technique and a new frequency compensation scheme. Designed in standard 65nm CMOS, the driver delivers 5I.2mW peak power to 16Ω 0.33nF load, while consuming 0.97mW. It achieves -101.4dB THD+N over full audio band, the lowest ever reported linearity among sub-milliwatt CMOS class-AB drivers. Compared to prior works, it has >12dB better linearity and >7x higher unity-gain bandwidth, resulting in 2.5x improvement in linearity FOM (=Peak Load Power/ (Quiescent Power × THD+N[%])).