20 records found
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Virtual execution platforms for mixed-time-criticality systems: The CompSOC architecture and design flow
Architecture and design flow for a debug event distribution interconnect
Scalable parallel programming applied to H.264/AVC decoding
Efficient execution of video applications on heterogeneous multi- and many-core processors,
An Instruction to Accelerate Software Caches
A multidimensional software cache for scratchpad-based systems
The SARC architecture
Performance evaluation of macroblock-level parallelization of H.264 decoding on a cc-NUMA multiprocessor architecture
Parallel H.264 decoding on an embedded multicore processor
An efficient software cache for H.264 motion compensation
Scalability of macroblock-level parallelism for H.264 decoding
Scalar processing overhead on SIMD-only architectures
Parallel scalability of video decoders
Analyzing scalability of deblocking filter of H.264 via TLP exploitation in a new many-core architecture
Analyses of video filtering on the cell processor
Exploiting parallelism of deblocking filter of H.264 on DTA architecture
Parallel Scalability of H.264
H.264/AVC HDTV motion compensation soft IP
Analysis of video filtering on the cell processor
