112 records found
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A predictor-based power-saving policy for DRAM memories
Scalable parallel programming applied to H.264/AVC decoding
Composable Local Memory Organisation for Streaming Applications on Embedded MPSoCs
An Instruction to Accelerate Software Caches
Nexus: hardware support for task-based programming
A case for hardware task management support for the StarSS programming
Extending the cell SPE with energy efficient branch prediction
Protective redundancy overhead reduction using instruction vulnerability factor
Evaluation of parallel H.264 decoding strategies for the cell broadband engine
A multidimensional software cache for scratchpad-based systems
The SARC architecture
Instruction precomputation with memoization for fault detection
Performance evaluation of macroblock-level parallelization of H.264 decoding on a cc-NUMA multiprocessor architecture
Scalability of macroblock-level parallelism for H.264 decoding
Scalar processing overhead on SIMD-only architectures
SIMD architectural enhancements to improve the performance of the 2D discrete wavelet transform
Specialization of the cell SPE for media applications
Instruction precomputation for fault detection
Limiting the number of dirty cache lines
