112 records found
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A predictor-based power-saving policy for DRAM memories
Scalable parallel programming applied to H.264/AVC decoding
Composable Local Memory Organisation for Streaming Applications on Embedded MPSoCs
An Instruction to Accelerate Software Caches
Nexus: hardware support for task-based programming
A multidimensional software cache for scratchpad-based systems
The SARC architecture
A case for hardware task management support for the StarSS programming
Protective redundancy overhead reduction using instruction vulnerability factor
Evaluation of parallel H.264 decoding strategies for the cell broadband engine
Extending the cell SPE with energy efficient branch prediction
Instruction precomputation with memoization for fault detection
Specialization of the cell SPE for media applications
Parallel H.264 decoding on an embedded multicore processor
Scalar processing overhead on SIMD-only architectures
Instruction precomputation for fault detection
Energy efficient branch prediction on the cell SPE
Performance evaluation of macroblock-level parallelization of H.264 decoding on a cc-NUMA multiprocessor architecture
Performance improvement of multimedia kernels by alleviating overhead instructions on SIMD devices
Scalability of macroblock-level parallelism for H.264 decoding
