112 records found
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Scalable parallel programming applied to H.264/AVC decoding
A predictor-based power-saving policy for DRAM memories
Composable Local Memory Organisation for Streaming Applications on Embedded MPSoCs
Nexus: hardware support for task-based programming
An Instruction to Accelerate Software Caches
Protective redundancy overhead reduction using instruction vulnerability factor
Evaluation of parallel H.264 decoding strategies for the cell broadband engine
The SARC architecture
Extending the cell SPE with energy efficient branch prediction
A multidimensional software cache for scratchpad-based systems
A case for hardware task management support for the StarSS programming
Instruction precomputation with memoization for fault detection
Instruction precomputation for fault detection
Limiting the number of dirty cache lines
Specialization of the cell SPE for media applications
Performance evaluation of macroblock-level parallelization of H.264 decoding on a cc-NUMA multiprocessor architecture
Scalar processing overhead on SIMD-only architectures
An efficient software cache for H.264 motion compensation
Intra-vector SIMD instructions for core specialization
Scalability of macroblock-level parallelism for H.264 decoding
