The hArtes tool chain

Extensions of the hArtes tool chain

System-Level Design Space Exploration of Reconfigurable Architectures

Evaluation of runtime task mapping heuristics with rSesame - a case study

Runtime task mapping based on hardware configuration reuse

rSesame - a generic system-level runtime simulation framework for reconfigurable architectures

System level runtime mapping exploration of reconfigurable architectures

A multipurpose clustering algorithm for task partitioning in multicore reconfigurable systems

Towards system level runtime design space exploration of reconfigurable architectures

High level quantitative interconnect estimation for early design space exploration

System-level design space exploration of dynamic reconfigurable architectures

System-level dynamic exploration and mapping for dynamic reconfigurable system

HaRTES toolchain early evaluation: profiling, compilation and HDL generation

A profiling framework for design space exploration in heterogeneous systems context

Quantitative prediction for early design space exploration in Delft workbench: an outlook