Fast and accurate readout of qubits is essential for feedback and error-correction protocols in scalable quantum processors. Current methods of readout in spin qubit processors require long times due to noise and drift present. The timing budget for feedback control and correction is further strained by the transfer of data to the host and back to the controller.
This thesis explores two complementary methods to speed up the readout: first, readout electronics integrated with programmable logic on the same boards reduce the latency of communication between the host and measurement setup, and second, a framework to reduce measurement times is devised by executing Machine Learning (ML) enhanced classification deployed on the same programmable logic.
We demonstrate the utility of the Radio-Frequency System on Chip (RFSoC) board for measurements of gate-defined semiconductor spin qubit devices. The design also incorporates an ML-accelerator for readout with a simulated latency of 58 ns for the classification of states.
This work enables the implementation of sophisticated readout techniques close to data acquisition electronics, which allows experiments that are not possible on conventional control electronics, which are either host-centric, requiring extensive calibration, or have block-box designs restricting hardware reprogrammability for specific experiments.