In spite of progress on hardware design languages, the design of high-performance hardware accelerators forces many design decisions specializing the interfaces of these accelerators in ways that complicate the understanding of the design and hinder modularity and collaboration.
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In spite of progress on hardware design languages, the design of high-performance hardware accelerators forces many design decisions specializing the interfaces of these accelerators in ways that complicate the understanding of the design and hinder modularity and collaboration. In response to this challenge, Tydi is presented as an open specification for streaming dataflow designs in digital circuits, allowing designers to express how composite and variable-length data structures are transferred over streams using clear, data-centric types. In contrast, Chisel, with its high level of abstraction and customizability offers a suitable platform to implement Tydi-based components. In this paper, Tydi-Chisel is presented along with an A-to-Z design-process description. Tydi-Chisel aims to simplify the design of data-streaming accelerators through the integration of the Tydi interface standard in Chisel, along with helper components and syntax sugar. In combination Chisel and Tydi help bridge the hardware-software divide, making solo-design and collaboration between designers easier.Project repository: https://github.com/ccromjongh/Tydi-Chisel@en
