True Random Number Generators (TRNG) are fundamental cryptographic primitives. They are needed, for example, to generate cryptographic keys and numbers. Poor random number generation can lead to weaknesses in the cryptographic system. A good example can be found in the work of Heninger et al., who managed to retrieve large amounts of private RSA keys due to entropy problems in random number generators used for key generation.

Statistical test suites such as Dieharder and NIST SP 800-22 can be used to determine whether random number generators provide the required entropy. To improve such an evaluation, which is necessary for high-assurance applications, a stochastic model of the noise source must be developed as described, for example, in AIS 20/31.

The research presented in this thesis focuses on designing and validating a noise source based on counting ring oscillator periods. The work presents an analysis of this ring oscillator-based design, consisting of stochastic models, entropy evaluations, high-level and SPICE simulations, and hardware validation using the Intel Arria 10 FPGA platform.

Using the developed models, this work (i) quantifies the improvement in randomness due to sampling the noise source with a second ring oscillator, (ii) establishes a lower bound for the min-entropy of the noise source, and (iii) shows that the design benefits from using ring oscillators with shorter periods and, thus, less area. These findings are verified in high-level and SPICE simulations.

In the end, despite the appealing theoretical benefits of the proposed TRNG noise source, the hardware validation revealed unmodeled noise components, leading to inconclusive results. Consequently, no TRNG implementation based on the designed noise source was made. This highlights the challenges of translating theoretical advantages into successful hardware implementations.