Fan-out of 2 Triangle Shape Spin Wave Logic Gates

Conference paper (2021)

Authors

A.N.N. Mahmoud Computer Engineering - EEMCS
S.D. Cotofana Computer Engineering - EEMCS
S. Hamdioui Quantum & Computer Engineering
Research Group
Computer Engineering (EEMCS) (TU Delft)
Copyright: © 2021 A.N.N. Mahmoud, Christoph Adelmann, Frederic Vanderveken, S.D. Cotofana, Florin Ciubotaru, S. Hamdioui
DOI
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https://doi.org/10.23919/DATE51398.2021.9474089
Energy Efficiency Spin-wave Spin-wave Computation Paradigm Triangle Shape Logic Gate Fan-out
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Published Date

2021

Language

English

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Faculty

Electrical Engineering, Mathematics and Computer Science

Department

Quantum & Computer Engineering

Research Group

Computer Engineering

Abstract

Having multi-output logic gates saves much energy because the same structure can be used to feed multiple inputs of next stage gates simultaneously. This paper proposes novel triangle shape fanout of 2 spin wave Majority and XOR gates; the Majority gate is achieved by phase detection, whereas the XOR gate is achieved by threshold detection. The proposed logic gates are validated by means of micromagnetic simulations. Furthermore, the energy and delay are estimated for the proposed structures and compared with the state-of-the-art spin wave, and 16 nm and 7 nm CMOS logic gates. The results demonstrate that the proposed structures provide energy reduction of 25%–50% in comparison to the other 2-output spin-wave devices while having the same delay, and energy reduction of 43x-0.8x when compared to the 16 nm and 7 nm CMOS counterparts while having delay overhead of 11x-40x.