Make it Darker: A Gray Code Popcounter to Protect BNN CIM Against Power Attacks

Conference Paper (2026)
Author(s)

Fouwad Jamil Mir (TU Delft - Electrical Engineering, Mathematics and Computer Science, Cognitive IC)

Asmae El Arrassi (TU Delft - Electrical Engineering, Mathematics and Computer Science)

Abdullah Aljuffri (TU Delft - Electrical Engineering, Mathematics and Computer Science)

Said Hamdioui (TU Delft - Electrical Engineering, Mathematics and Computer Science)

Mottaqiallah Taouil (TU Delft - Electrical Engineering, Mathematics and Computer Science)

Research Group
Computer Engineering
DOI related publication
https://doi.org/10.23919/date69613.2026.11539260 Final published version
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Publication Year
2026
Language
English
Research Group
Computer Engineering
Publisher
IEEE
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Abstract

Binary Neural Networks (BNNs) have obtained a strong foothold in the field of machine learning at the edge due to their minimal hardware requirements. However, their energy and performance efficiency remain hindered by frequent data transfer between memory and processors. Computation-in-memory (CIM) architectures address this problem by embedding processing units within the memory. Unfortunately, current implementations of CIM are susceptible to IP piracy attacks through side channels. This paper presents a novel secure periphery scheme for NN accelerators with sequential accumulation that conceals IP information by obscuring the power consumption of the counter responsible for the leakage. This is achieved by combining two innovative techniques: operand schedule randomization and an always-count Gray code counter. The results demonstrate that the proposed design effectively resists power side channel attacks (SCAs). Moreover, Signal-to-Noise Ratio (SNR) and Test Vector Leakage Assessment (TVLA) show safe leakage levels. Compared to the state-of-the-art, our countermeasure reduces area and power overheads by up to 12.7× and 13.3×, achieving only 37% area and 51.2% power overhead with the added protection logic. Notably, this enhanced security comes with zero latency overhead, maintaining the performance of the baseline design.

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