Compensation Method for Die Shift in Fan-Out Packaging

Abstract

The diversified system requirements have been continuously growing to drive the development of a variety of new package styles. Wafer-Level Packaging (WLP) technology has drawn attention with its thinner package due to the removal of substrate and thus higher performance. With the greater design flexibility in having more I/Os, Fan-out Wafer Level Packaging (FOWLP) technology has proven to be a more optimal and promising solution. Infineon's eWLB was introduced as the first generation FOWLP technology. In the eWLB technology, die shift is the processing defect that the die moves from its default position result in the wire disconnection. Placing the dies at the preset pitch can compensate the die shift before die attach process. In this paper, the key factors to controlling die shift will be discussed, and the complex process capability index (Cpk) of process is 2.06 which represents the die shift can be well minimized after compensation.