A Sub-1 v 90 dB-SNDR Power/BW Scalable DTDSM Using Low-Voltage Cascoded Floating Inverter Amplifiers in 130 nm CMOS
Xinjie Wu (Zhejiang University)
Y. Liu (TU Delft - Electronic Components, Technology and Materials)
Zhangming Zhu (Xidian University)
Xiao Peng Yu (Zhejiang University)
Nick Nianxiong Tan (Vango Technologies Inc., Hangzhou)
Zhong Tang (Vango Technologies Inc., Hangzhou)
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Abstract
This paper presents a sub-1V delta-sigma modulator (DSM) with power and bandwidth (BW) scalability for IoT applications. It is built around a fully dynamic and low-voltage floating inverter amplifier (LVFIA). To extend the power and BW scalability of the LVFIA, its relatively supply-independent bias current is auto-controlled by DSM's sampling frequency fs. Dynamic techniques such as auto-zeroing and chopping are applied to achieve low noise. Fabricated in a 130nm CMOS, the proposed sub-1V DSM shows a near-consistent SNDR (90dB) and linearly scalable power and BW (2.5nW/Hz) over a ×30 scaling range of fs. It achieves Walden FoM and Schreier FoM of 51.3fJ/conv-step and 175.7dB, respectively.
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