Boolean Logic Gate Exploration for Memristor Crossbar

Conference Paper (2016)
Author(s)

Lei Xie (TU Delft - Computer Engineering)

H.A. Du Nguyen (TU Delft - Computer Engineering)

Mottaqiallah Taouil (TU Delft - Computer Engineering)

Said Hamdioui (TU Delft - Computer Engineering)

Koen L.M. Bertels (TU Delft - FTQC/Bertels Lab, TU Delft - Quantum & Computer Engineering)

Research Group
Computer Engineering
DOI related publication
https://doi.org/10.1109/DTIS.2016.7483889
More Info
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Publication Year
2016
Language
English
Research Group
Computer Engineering
Pages (from-to)
1-6
ISBN (electronic)
978-1-5090-0336-5

Abstract

Emerging technologies are under research as alternatives for next-generation VLSI circuits. One of the promising candidates is memristor due to its scalability, high integration density, non-volatility, etc. Different design styles of memristor-based logic circuits have been proposed. This paper first overviews these design styles and compares them using several criteria. Subsequently, it selects a promising candidate to explore its potential logic gate space. Thereafter, it derives control voltage constraints used to ensure correct logic gate functionality. The newly obtained logic gates are verified by SPICE simulations, and finally the performance of the memristor gates are compared with CMOS gates. The results show that the memristor gates, with reasonable technology improvements, are comparable to CMOS gates or even outperform them.

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