MFA-MTJ Model
Magnetic-Field-Aware Compact Model of pMTJ for Robust STT-MRAM Design
Lizhou Wu (National University of Defense Technology)
Siddharth Rao (IMEC-Solliance)
Mottaqiallah Taouil (TU Delft - Computer Engineering)
Erik Jan Marinissen (IMEC-Solliance)
Gouri Sankar Kar (IMEC-Solliance)
S. Hamdioui (TU Delft - Quantum & Computer Engineering)
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Abstract
The popularity of perpendicular magnetic tunnel junction (pMTJ)-based spin-transfer torque magnetic random access memories (STT-MRAMs) is growing very fast. The performance of such memories is very sensitive to magnetic fields, including both internal and external ones. This article presents a magnetic-field-aware compact model of pMTJ, named the MFA-magnetic tunnel junction (MTJ) model, for magnetic/electrical co-simulation of MTJ/CMOS circuits. Magnetic measurement data of MTJ devices, with diameters ranging from 35 to 175 nm, are used to calibrate an in-house magnetic coupling model. This model is subsequently integrated into our developed compact pMTJ model, which is implemented in Verilog-A. The superiority of the proposed MFA-MTJ model for device/circuit co-design of STT-MRAM is demonstrated by simulating a single pMTJ as well as STT-MRAM full circuits. The design space is explored under PVT variations and various configurations of magnetic fields.