Graphene Nanoribbon Based McCulloch-Pitts Neural Network

Conference Paper (2024)
Authors

Florin-Silviu Dumitru (National University of Science and Technology Politehnica Bucharest)

M Enachescu (TU Delft - Computer Engineering, National University of Science and Technology Politehnica Bucharest)

Alexandru Antonescu (National University of Science and Technology Politehnica Bucharest)

N Cucu-Laurenciu (Radboud Universiteit Nijmegen, TU Delft - Computer Engineering)

S.D. Cotofana (TU Delft - Computer Engineering)

Research Group
Computer Engineering
More Info
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Publication Year
2024
Language
English
Research Group
Computer Engineering
Pages (from-to)
592-597
ISBN (electronic)
9798350386240
DOI:
https://doi.org/10.1109/NANO61778.2024.10628801
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Abstract

In the context of an artificial intelligence and machine learning landscape that is evolving at an unprecedented pace, we propose a low power, high-speed, mixed-signal graphene nanoribbon-based (GNR) McCulloch-Pitts neuron (MCPN) implementation featuring programmable synaptic weights and inhibitory inputs. By definition, a generic MCPN is comprised of two parts, a weighted summation element and a decision element, called a soma. Our summation element implementation uses three distinct non-rectangular GNR devices, biased under specific conditions, to fulfill the roles of current source, low-side and high-side switches. The programmable excitatory and inhibitory synapses were obtained leveraging GNR SRAM cells and logic gates, hence providing the flexibility needed by real-world applications. The decision element's threshold activation function was implemented using a chain of GNR inverter structures which manifest the function's characteristic in the analog domain. Modulation of the decision element's threshold is achieved indirectly by means of a configurable resistive load which is varied depending on the configuration stored in SRAM. Our benchmark results, obtained using a generic 5 by 5 pixel pattern recognition application, reveal that the GNR-based implementation achieves 3.5× less power consumption, 20 × higher speed, while occupying 3 × less active area when compared to its FinFET analog circuit counterpart.

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