Improving Metastability in Synchronous SAR ADCs
J. Hildebrand (TU Delft - Electrical Engineering, Mathematics and Computer Science)
K. Bult – Mentor (TU Delft - Electronics)
F Sebastiano – Mentor (TU Delft - Quantum Circuit Architectures and Technology)
M Babaie – Graduation committee member (TU Delft - Electronics)
More Info
expand_more
Other than for strictly personal use, it is not permitted to download, forward or distribute the text or part of it, without the consent of the author(s) and/or copyright holder(s), unless the work is under an open content license such as Creative Commons.
Abstract
This thesis focuses on the design and optimization of Successive-approximation (SAR) Analog-to-Digital Converter (ADC), with a primary focus on enhancing the Bit Error Rate (BER). SAR ADCs are widely used in various applications due to their power-efficient characteristics. The critical point addressed in this research is improving the BER of synchronous SAR ADCs without the necessity to reduce the sampling speed...
Files
File under embargo until 21-08-2025