An Aging-Robust 32MHz RC Frequency Reference with 0.4ppm Allan Deviation and ±1550ppm Inaccuracy from -40°C to 125°C after a 1-Point Trim

Conference Paper (2025)
Author(s)

S. Pan (Tsinghua University)

J. Zeng (Tsinghua University)

X. Liu (Beihang University)

Y. Cheng (Tsinghua University)

K.A.A. Makinwa (TU Delft - Microelectronics)

H. Wu (Tsinghua University)

Department
Microelectronics
DOI related publication
https://doi.org/10.1109/A-SSCC67472.2025.11349560 Final published version
More Info
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Publication Year
2025
Language
English
Department
Microelectronics
Pages (from-to)
61-63
Publisher
IEEE
ISBN (print)
979-8-3315-8632-4
ISBN (electronic)
979-8-3315-8631-7
Event
2025 IEEE Asian Solid-State Circuits Conference (A-SSCC) (2025-11-02 - 2025-11-05), Daejeon, Korea, Republic of
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Abstract

RC-based frequency references [1-6] are widely used for clock generation in SoCs since they are compact, low power, and can achieve medium frequency accuracy. Designs based on low-TC poly resistors can achieve inaccuracies of a few 100 ppm[1-5], but this is dwarfed by their drift, which can be as large as 5000 ppm after accelerated aging [5-6]. Although designs based on via-metal [4] or diffusion [6] resistors exhibit significantly lower drift, in the order of several 100 ppm, their larger TCs mean that a 2-point trim is required to achieve inaccuracies of several 100 ppm. This paper presents an aging-robust 32 MHz RC frequency reference based on diffusion resistors and a BJT-based temperature compensation scheme. After a low-cost 1-point trim, it achieves ± 1550ppm inaccuracy from -40 C to 125 C, which increases to ± 2350ppm after accelerated aging. Due to the extensive use of dynamic error-correction techniques, it also achieves an Allan deviation floor of 0.4 ppm, corresponding to state-of-the-art short-term stability.

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