Enhanced Bipolar Transistor Design for the Linearization of the Base-Collector Capacitance

Abstract

A frequency, bias and output power independent linearization technique for reducing the non-linear base-collector capacitance related distortion is proposed. Based on Volterra series analysis, the optimum base-collector capacitance for linear device operation is determined while respecting physical constrains. It is shown that by modifying the extrinsic base-collector region for an otherwise uncompromised device, the Cbc linearity compensation can be included within the transistor design itself. The practicality of this implementation is demonstrated by considering the doping profile accuracy requirements for achieving a significant OIP3 improvement of at least 5dB.